Transistor, method for manufacturing transistor, semiconductor device, and electronic device

• US 9,685,560 B2
• Filed: 03/01/2016
• Issued: 06/20/2017
• Est. Priority Date: 03/02/2015
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamamoto, Yoshitaka, Yamazaki, Shunpei
• Primary Examiner(s): HO, TU TU V
• Application Number:
  US15/057,364
• Publication Number:
  US 20160260835A1
• Time in Patent Office: 476 Days
• Field of Search: 257 43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/0684 characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.

Claims

1. A transistor comprising:

a first oxide layer;

a second oxide layer comprising a first region, a second region, a third region, a fourth region, and a fifth region;

a third oxide layer;

an insulating layer;

a first electrode;

a second electrode;

a third electrode; and

a structure body,

wherein the first oxide layer is in contact with the second oxide layer,

wherein the second oxide layer is in contact with the third oxide layer,

wherein the first region, and the second oxide layer, and the third oxide layer overlap with one another,

wherein the first electrode is over the first region with the insulating layer interposed between the first electrode and the first region,

wherein the structure body is positioned over the second oxide layer to cover a side surface of the first electrode,

wherein the second region and the first electrode overlap with each other,

wherein the third region and the structure body overlap with each other,

wherein the fourth region is in contact with the second electrode,

wherein the fifth region is in contact with the third electrode,

wherein the second oxide layer is an oxide semiconductor, and

wherein the third region, the fourth region, and the fifth region each contain an element different from an element contained in the second region.

2. The transistor according to claim 1, wherein the structure body covers a side surface of the third oxide layer.

3. The transistor according to claim 1, wherein the structure body comprises silicon and oxygen.

4. The transistor according to claim 1, wherein the element is tungsten, titanium, aluminum, or a rare gas element.

5. The transistor according to claim 1, wherein the second oxide layer comprises one or both of indium and zinc.

6. The transistor according to claim 1, wherein the first oxide layer and the third oxide layer contain a metal element that is the same kind as at least one metal element contained in the second oxide layer.

7. The transistor according to claim 1, wherein the second oxide layer comprises a c-axis aligned crystalline oxide semiconductor.

8. A semiconductor device comprising:

the transistor according to claim 1; and

a capacitor or a resistor.

9. An electronic device comprising:

the semiconductor device according to claim 8; and

an antenna, a battery, an operation switch, a microphone, or a speaker.

10. An electronic device comprising:

the transistor according to claim 1; and

an antenna, a battery, an operation switch, a microphone, or a speaker.