Systems and methods for controlling access to a shared data structure with reader-writer locks using multiple sub-locks
First Claim
1. A computer system for controlling access to a shared data structure, comprising:
- a first processing unit coupled to a first cache dedicated to the first processing unit;
a second processing unit coupled to a second cache dedicated to the second processing unit;
a shared memory coupled to the first and second processing units that stores a multi-lock to control access to a data structure shared by the first and second processing units, the multi-lock comprising a first sub-lock associated with the first processing unit and a second sub-lock associated with the second processing unit, the sub-locks comprising a read portion and a write portion;
a coherence bus that couples the first and second caches and carries coherency information between the first and second caches; and
a data access control engine to receive a request to read from the data structure from the first processing unit and, as a result;
determine whether a privately modifiable copy the first sub-lock exists in the first cache;
acquire the read portion of the first sub-lock and not communicate the acquisition across the coherence bus if a privately modifiable copy of the first sub-lock exists in the first cache; and
if a privately modifiable copy of the first sub-lock does not exist in the first cache, load the first sub-lock into the first cache if no copy is in the first cache, shootdown other copies of the first sub-lock, and acquire the read portion of the first sub-lock.
2 Assignments
0 Petitions
Accused Products
Abstract
A computer system for controlling access to a shared data structure includes a shared memory coupled to first and second processing units that stores a multi-lock to control access to a shared data structure. The multi-lock includes a first sub-lock associated with the first processing unit and a second sub-lock associated with the second processing unit The system also includes a data access control engine to receive a request to read from the data structure from the first processing unit and, as a result, determine whether a privately modifiable copy the first sub-lock exists in a first cache dedicated to the first processing unit, acquire a read portion of the first sub-lock and not communicate the acquisition across a coherence bus if a privately modifiable copy of the first sub-lock exists in the first cache, and if a privately modifiable copy of the first sub-lock does not exist in the first cache, load the first sub-lock into the first cache if no copy is in the first cache, shootdown other copies of the first sub-lock, and acquire the read portion of the first sub-lock.
-
Citations
15 Claims
-
1. A computer system for controlling access to a shared data structure, comprising:
-
a first processing unit coupled to a first cache dedicated to the first processing unit; a second processing unit coupled to a second cache dedicated to the second processing unit; a shared memory coupled to the first and second processing units that stores a multi-lock to control access to a data structure shared by the first and second processing units, the multi-lock comprising a first sub-lock associated with the first processing unit and a second sub-lock associated with the second processing unit, the sub-locks comprising a read portion and a write portion; a coherence bus that couples the first and second caches and carries coherency information between the first and second caches; and a data access control engine to receive a request to read from the data structure from the first processing unit and, as a result; determine whether a privately modifiable copy the first sub-lock exists in the first cache; acquire the read portion of the first sub-lock and not communicate the acquisition across the coherence bus if a privately modifiable copy of the first sub-lock exists in the first cache; and if a privately modifiable copy of the first sub-lock does not exist in the first cache, load the first sub-lock into the first cache if no copy is in the first cache, shootdown other copies of the first sub-lock, and acquire the read portion of the first sub-lock. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A method for controlling access to a shared data structure, comprising:
-
storing a multi-lock to control access to the data structure, the multi-lock comprising a first sub-lock associated with a first processing unit and a second sub-lock associated with a second processing unit, each sub-lock comprising a read portion and a write portion; receiving a request to read from the data structure from the first processing unit; determining whether a privately modifiable copy of the first sub-lock exists in a first cache dedicated to the first processing unit; acquiring the read portion of the first sub-lock and not communicating the acquisition across a coherence bus between the first cache and a second cache dedicated to the second processing unit if a privately modifiable copy of the first sub-lock exists in the first cache; and loading the first sub-lock into the first cache if no copy is in the first cache and acquiring the read portion of the first sub-lock if a privately modifiable copy of the first sub-lock does not exist in the first cache. - View Dependent Claims (8, 9, 10, 11, 12)
-
-
13. A non-transitory computer-readable storage device storing software that, when executed by a processor including a coherence bus, causes the processor to:
-
store a multi-lock to control access to a data structure, the multi-lock comprising a first sub-lock associated with a first processing unit and a second sub-lock associated with a second processing unit, each sub-lock comprising a read portion and a write portion; receive a request to read from the data structure from the first processing unit; determine whether a privately modifiable copy of the first sub-lock exists in a first cache dedicated to the first processing unit; acquire the read portion of the first sub-lock and not communicate the acquisition to a second cache dedicated to the second processing unit if a privately modifiable copy of the first sub-lock exists in the first cache; and load the first sub-lock into the first cache if no copy is in the first cache and acquire the read portion of the first sub-lock if a privately modifiable copy of the first sub-lock does not exist in the first cache. - View Dependent Claims (14, 15)
-
Specification