Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication

• US 9,691,696 B2
• Filed: 01/25/2016
• Issued: 06/27/2017
• Est. Priority Date: 03/12/2014
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Invensas Corporation
• Inventors: Shen, Hong, Wang, Liang, Katkar, Rajesh
• Primary Examiner(s): ARMAND, MARC ANTHONY
• Application Number:
  US15/005,220
• Publication Number:
  US 20160155695A1
• Time in Patent Office: 519 Days
• Field of Search: 257686
• CPC Class Codes: H01L 21/2885 using an external electrical current, i.e. electro-deposition
• CPC Class Codes: H01L 21/4803 Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks H01L21/4846 takes precedence; printed circuit boards H05K1/00
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/76879 by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating plating on semiconductors in general H01L21/288
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/17181 On opposite sides of the body
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2225/06548 Conductive via connections through the substrate, container, or encapsulation
• CPC Class Codes: H01L 2225/06555 Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/055 the leads having a passage through the base H01L23/057 takes precedence
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/147 Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/315 : the encapsulation having a cavity
• CPC Class Codes: H01L 23/3675 : characterised by the shape of the housing
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49838 : Geometry or layout
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0655 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

Stacked dies (110) are encapsulated in an interposer'"'"'s cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 620.3) connect the dies to the cavity'"'"'s bottom wall (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

Claims

1. An assembly comprising:

a substrate whose top side comprises a cavity comprising a bottom wall;

one or more contact pads under the bottom wall;

a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer made of cured resin at least partially cured separately from the encapsulant layer of any other level; and

electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall.

2. The assembly of claim 1 wherein the one or more contact pads under the bottom wall are part of a redistribution layer formed on a bottom surface of the substrate.

3. The assembly of claim 1 wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad.

4. The assembly of claim 3 wherein the electrically conductive wiring comprises, at a top of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment.

5. The assembly of claim 3 wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment.

6. The assembly of claim 3 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other.

7. The assembly of claim 1 wherein each encapsulant layer does not have any separately cured sub-layers.

8. The assembly of claim 1, comprising one or more contact pads on top of the plurality of levels, for connection to structures external to the assembly.

9. The assembly of claim 1 wherein in least one level, at least one die is part of a multi-chip module contained by the level.

10. The assembly of claim 1 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level.

11. An assembly comprising:

a substrate whose top side comprises a cavity comprising a bottom wall;

one or more contact pads under the bottom wall;

a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer comprising organic polymer; and

electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall;

wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad; and

wherein the electrically conductive wiring comprises, at a top of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment.

12. The assembly of claim 11 wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment.

13. The assembly of claim 11 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other.

14. The assembly of claim 11 wherein the one or more contact pads under the bottom wall are part of a redistribution layer formed on a bottom surface of the substrate.

15. The assembly of claim 11, comprising one or more contact pads on top of the plurality of levels, for connection to structures external to the assembly.

16. The assembly of claim 11 wherein in least one level, at least one die is part of a multi-chip module contained by the level.

17. The assembly of claim 11 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level.

18. An assembly comprising:

a substrate whose top side comprises a cavity comprising a bottom wall;

one or more contact pads under the bottom wall;

a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer comprising organic polymer; and

electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall;

wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad; and

wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment.

19. The assembly of claim 18 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other.

20. The assembly of claim 18 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level.