Motor driving circuit to reduce switching loss

• US 9,692,328 B2
• Filed: 03/03/2015
• Issued: 06/27/2017
• Est. Priority Date: 03/03/2015
• Status: Active Grant

• Current Assignee: Asia Vital Components Company Limited
• Original Assignee: Asia Vital Components Company Limited
• Inventors: Yao, Bao-Lin, Hu, Qing-Wu
• Primary Examiner(s): Santana, Eduardo Colon
• Assistant Examiner(s): Laughlin, Charles S
• Application Number:
  US14/636,192
• Publication Number:
  US 20160261212A1
• Time in Patent Office: 847 Days
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: H02P 6/15 Controlling commutation time
• CPC Class Codes: H02P 6/26 Arrangements for controlling single phase motors

Abstract

The present invention provides a motor driving circuit to reduce switching loss, which is applied to a motor. The motor driving circuit comprises a motor driving unit, a push-pull output unit, and a control unit. The control unit is coupled to the motor driving unit and the push-pull output unit. The control unit transmits a driving voltage to drive the push-pull output unit such that the push-pull output unit generates amplified currents which are transmitted to the motor driving unit. The motor driving unit reduces charge/discharge periods thereof based on the received amplified currents.

Claims

1. A motor driving circuit to reduce switching loss, which is applied to a motor, comprising:

a motor driving unit having a first switch, a second switch, a third switch, and a fourth switch, wherein each of the first, second, third, and fourth switches has a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the second terminals of the first and third switches are individually coupled to the corresponding third terminals of the second and fourth switches, wherein the third terminal of the first switch is coupled to the third terminal of the third switch, wherein the second terminal of the second switch is coupled to the second terminal of the fourth switch, wherein the fourth terminals of the second and fourth switches are coupled to a ground terminal, wherein the first terminal of the third switch is coupled to an input voltage;

a push-pull output unit having a first push-pull amplifier and a second push-pull amplifier, wherein each of the first and second push-pull amplifiers has a first end, a second end, a third end, and a fourth end, wherein the second and third ends of the first push-pull amplifier are connected to the fourth and first terminals of the first switch, respectively, wherein the second and third ends of the second push-pull amplifier are connected to the fourth and first terminals of the third switch, respectively, wherein the fourth ends of the first and second push-pull amplifiers are connected to the ground terminal;

a control unit having a plurality of pins, wherein a first pin is coupled to the first ends of the first and second push-pull amplifiers and transmits a driving voltage to the first and second push-pull amplifiers such that the first and second push-pull amplifiers are driven to generate a first amplified current and a second amplified current, respectively, wherein the first and third switches individually receive the first and second amplifier currents, respectively, to reduce charge/discharge periods thereof;

wherein a second pin and a third pin of the control unit are coupled to the first terminals of the fourth and second switches, respectively, wherein the second and third pins of the control unit transmit a first signal and a second signal to the first terminals of the fourth and second switches, respectively; and

wherein the first push-pull amplifier has a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor, wherein each of the first, second, and third transistors has a base, an emitter, and a collector, wherein the collector of the first transistor is coupled to the first terminal of the first switch, one end of the first resistor, and the input voltage, wherein the emitter of the first transistor is coupled to the emitter of the second transistor and the fourth terminal of the first switch, wherein the collector of the second transistor is coupled to the ground terminal, wherein the base of the second transistor is coupled to the base of the first transistor, the other end of the first resistor, and the collector of the third transistor, wherein the emitter of the third transistor is coupled to the ground terminal, wherein the base of the third transistor is coupled to one end of the second resistor, wherein the other end of the second resistor is coupled to the first pin of the control unit.

2. The motor driving circuit to reduce switching loss according to claim 1, wherein the second push-pull amplifier has a fourth transistor, a fifth transistor, a sixth transistor, a third resistor, and a fourth resistor, wherein each of the fourth, fifth, and sixth transistors has a base, an emitter, and a collector, wherein the collector of the fourth transistor is coupled to the first terminal of the third switch and one end of the third resistor, wherein the emitter of the fourth transistor is coupled to the emitter of the fifth transistor and the fourth terminal of the third switch, wherein the collector of the fifth transistor is coupled to the end terminal, wherein the base of the fifth transistor is coupled to the base of the fourth transistor, the other end of the third resistor, and the collector of the sixth transistor, wherein the emitter of the sixth transistor is coupled to the first pin of the control unit, wherein the base of the sixth transistor is coupled to one end of the fourth resistor, wherein the other end of the fourth resistor is coupled to a fourth pin of the control unit.

3. The motor driving circuit to reduce switching loss according to claim 2, wherein the first switch comprises a first MOS transistor, a first capacitor, a fifth resistor, and a sixth resistor, wherein the first MOS transistor has a gate, a source, and a drain, wherein the source of the first MOS transistor is connected to one end of the motor, wherein two ends of the first capacitor are individually connected to the drain and the gate of the first MOS transistor, wherein one end of the fifth resistor is electrically connected to one end of the first capacitor, the input voltage, and the collector of the first transistor, wherein the other end of the fifth resistor is coupled to the other end of the first capacitor and one end of the sixth resistor, wherein the other end of the sixth resistor is coupled to the emitter of the first transistor.

4. The motor driving circuit to reduce switching loss according to claim 3, wherein the second switch comprises a second MOS transistor, a seventh resistor, and an eighth resistor, wherein the second MOS transistor has a gate, a source, and a drain, wherein the drain of the second MOS transistor is coupled to the one end of the motor and the source of the first MOS transistor, wherein the gate of the second MOS transistor is coupled to one end of the seventh resistor and one end of the eighth resistor, wherein the source of the second MOS transistor is coupled to the ground terminal and the other end of the eighth resistor, wherein the other end of the seventh resistor is coupled to the third pin of the control unit.

5. The motor driving circuit to reduce switching loss according to claim 4, wherein the third switch comprises a third MOS transistor, a second capacitor, a ninth resistor, and a tenth resistor, wherein the third MOS transistor has a gate, a source, and a drain, wherein the source of the third MOS transistor is coupled to the other end of the motor, wherein the drain of the third MOS transistor is coupled to the drain of the first MOS transistor, one end of the second capacitor, and one end of the ninth resistor, wherein the other end of the second capacitor is coupled to the gate of the third MOS transistor and the other end of the ninth resistor, wherein two ends of the tenth resistor are individually coupled to the other end of the ninth resistor and the emitter of the fourth transistor.

6. The motor driving circuit to reduce switching loss according to claim 5, wherein the fourth switch comprises a fourth MOS transistor, an eleventh resistor, and a twelfth resistor, wherein the fourth MOS transistor has a gate, a source, and a drain, wherein the drain of the fourth MOS transistor is coupled to the other end of the motor and the source of the third MOS transistor, wherein the gate of the fourth MOS transistor is coupled to one end of the eleventh resistor and one end of the twelfth resistor, wherein the source of the fourth MOS transistor is coupled to the ground terminal, wherein the other end of the eleventh resistor is coupled to the second pin of the control unit, wherein the other end of the twelfth resistor is coupled to the ground terminal.

7. The motor driving circuit to reduce switching loss according to claim 6, wherein the first and third MOS transistors are PMOS transistors, wherein the second and fourth MOS transistors are NMOS transistors.

8. The motor driving circuit to reduce switching loss according to claim 2, wherein the first, second, third, fourth, fifth, and sixth transistors are BJTs.