Pulse shaping biasing circuitry

• US 9,692,359 B1
• Filed: 12/13/2016
• Issued: 06/27/2017
• Est. Priority Date: 03/09/2016
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Inventors: Choi, Jinsung, Franco, Marcelo Jorge
• Primary Examiner(s): Jackson, Blane
• Application Number:
  US15/376,969
• Time in Patent Office: 196 Days
• CPC Class Codes: H03F 1/0222 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 2200/18 the bias of the gate of a FET being controlled by a control signal
• CPC Class Codes: H03F 2200/333 A frequency modulator or demodulator being used in the amplifier circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/528 the temperature dependence being controlled by referencing to the band gap
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/2173 of the bridge type
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H04B 2001/0408 with power amplifiers
• CPC Class Codes: H04L 25/03834 using pulse shaping
• CPC Class Codes: H04L 25/0384 Design of pulse shapes pulse shape for impulse radio H04B1/7172
• CPC Class Codes: H04L 27/367 using predistortion

Abstract

Pulse shaping biasing circuitry includes square wave generator circuitry, first inverse ramp signal generator circuitry, and second inverse ramp signal generator circuitry. The square wave generator circuitry is coupled between an input node and signal summation circuitry, and is configured to generate a square wave signal. The first inverse ramp signal generator circuitry is coupled in parallel with the square wave generator circuitry and configured to generate a first inverted ramp signal. The second inverse ramp signal generator circuitry is coupled in parallel with the square wave generator circuitry and the first inverse ramp signal generator circuitry and configured to generate a second inverted ramp signal. The square wave signal, the first inverted ramp signal, and the second inverted ramp signal are combined by the signal summation circuitry to provide a pulse shaping bias signal for a radio frequency (RF) power amplifier.

Claims

1. Pulse shaping biasing circuitry for a radio frequency (RF) power amplifier comprising:

signal summation circuitry configured to add one or more signals to provide at least a portion of a pulse-shaped bias signal for the RF power amplifier;

a square wave signal generator coupled between an input node and the signal summation circuitry and configured to generate a square wave signal;

first inverse ramp signal generator circuitry coupled in parallel with the square wave signal generator circuitry between the input node and the signal summation circuitry and configured to generate a first inverted ramp signal having a first slope and a first duration; and

second inverse ramp signal generator circuitry coupled in parallel with the square wave signal generator circuitry and the first inverse ramp signal generator circuitry between the input node and the signal summation circuitry and configured to generate a second inverted ramp signal having a second slope and a second duration, wherein the first slope is different from the second slope and the first duration is different from the second duration.

2. The pulse shaping biasing circuitry of claim 1 wherein:

the first inverse ramp signal generator is configured to generate the first inverse ramp signal based on a supply voltage provided to the RF power amplifier and a temperature; and

the second inverse ramp signal generator is configured to generate the second inverse ramp signal based on the supply voltage provided to the RF power amplifier and the temperature.

3. The pulse shaping biasing circuitry of claim 2 wherein the temperature is associated with the RF power amplifier.

4. The pulse shaping biasing circuitry of claim 2 wherein the temperature is associated with the pulse shaping biasing circuitry.

5. The pulse shaping biasing circuitry of claim 2 further comprising:

a first adjustable current amplifier coupled in series between the first inverse ramp signal generator circuitry and the signal summation circuitry and configured to adjust the first slope of the first inverted ramp signal; and

a second adjustable current amplifier coupled in series between the second inverse signal generator circuitry and the signal summation circuitry and configured to adjust the second slope of the second inverted ramp signal.

6. The pulse shaping biasing circuitry of claim 5 wherein:

the first inverse ramp signal generator circuitry is configured to generate the first inverted ramp signal based on a magnitude of the supply voltage; and

the second inverse ramp signal generator circuitry is configured to generate the second inverted ramp signal based on the magnitude of the supply voltage.

7. The pulse shaping biasing circuitry of claim 5 wherein the first inverse ramp signal generator circuitry and the second inverse ramp signal generator circuitry each comprise:

a temperature-dependent current source;

an adjustable ramp capacitance including a first terminal and a second terminal coupled to a fixed voltage;

a charging switch coupled between the first terminal of the adjustable ramp capacitance and the temperature-dependent current source;

a discharging switch coupled in parallel between the first terminal and the second terminal of the adjustable ramp capacitance; and

an inverting amplifier coupled between the first terminal of the adjustable ramp capacitance and an output terminal.

8. The pulse shaping biasing circuitry of claim 7 wherein the adjustable ramp capacitance in the first inverse ramp signal generator circuitry is different from the adjustable ramp capacitance in the second inverse ramp signal generator circuitry.

9. The pulse shaping biasing circuitry of claim 7 wherein the adjustable ramp capacitance in the first inverse ramp signal generator circuitry and the adjustable ramp capacitance in the second inverse ramp signal generator circuitry are adjusted based on the magnitude of the supply voltage.

10. The pulse shaping biasing circuitry of claim 7 wherein the temperature dependent current source in the first inverse ramp signal generator circuitry and the temperature dependent current source in the second inverse ramp signal generator circuitry are proportional to absolute temperature (PTAT) current sources.

11. A radio frequency (RF) transmitter section for a mobile terminal comprising:

a modulator configured to receive a baseband signal and modulate the baseband signal at a desired carrier frequency;

RF power amplifier circuitry coupled to the modulator and configured to receive the baseband signal from the modulator and a supply voltage and amplify the baseband signal for transmission from an antenna; and

pulse shaping biasing circuitry coupled to the RF power amplifier circuitry, the pulse shaping biasing circuitry configured to linearize a gain response of the RF power amplifier circuitry and comprising;

signal summation circuitry configured to add one or more signals to provide at least a portion of a pulse-shaped bias signal for the RF power amplifier;

a square wave signal generator coupled between an input node and the signal summation circuitry and configured to generate a square wave signal;

first inverse ramp signal generator circuitry coupled in parallel with the square wave signal generator circuitry between the input node and the signal summation circuitry and configured to generate a first inverted ramp signal having a first slope and a first duration; and

second inverse ramp signal generator circuitry coupled in parallel with the square wave signal generator circuitry and the first inverse ramp signal generator circuitry between the input node and the signal summation circuitry and configured to generate a second inverted ramp signal having a second slope and a second duration, wherein the first slope is different from the second slope and the first duration is different from the second duration.

12. The RF transmitter section of claim 11 wherein:

the first inverse ramp signal generator is configured to generate the first inverse ramp signal based on a supply voltage provided to the RF power amplifier and a temperature; and

the second inverse ramp signal generator is configured to generate the second inverse ramp signal based on the supply voltage provided to the RF power amplifier and the temperature.

13. The RF transmitter section of claim 12 wherein the temperature is associated with the RF power amplifier.

14. The RF transmitter section of claim 12 wherein the temperature is associated with the pulse shaping biasing circuitry.

15. The RF transmitter section of claim 12 further comprising:

a first adjustable current amplifier coupled in series between the first inverse ramp signal generator circuitry and the signal summation circuitry and configured to adjust the first slope of the first inverted ramp signal; and

a second adjustable current amplifier coupled in series between the second inverse signal generator circuitry and the signal summation circuitry and configured to adjust the second slope of the second inverted ramp signal.

16. The RF transmitter section of claim 15 wherein:

the first inverse ramp signal generator circuitry is configured to generate the first inverted ramp signal based on a magnitude of the supply voltage; and

the second inverse ramp signal generator circuitry is configured to generate the second inverted ramp signal based on the magnitude of the supply voltage.

17. The RF transmitter section of claim 15 wherein the first inverse ramp signal generator circuitry and the second inverse ramp signal generator circuitry each comprise:

a temperature-dependent current source;

an adjustable ramp capacitance including a first terminal and a second terminal coupled to a fixed voltage;

a charging switch coupled between the first terminal of the adjustable ramp capacitance and the temperature-dependent current source;

a discharging switch coupled in parallel between the first terminal and the second terminal of the adjustable ramp capacitance; and

an inverting amplifier coupled between the first terminal of the adjustable ramp capacitance and an output terminal.

18. The RF transmitter section of claim 17 wherein the adjustable ramp capacitance in the first inverse ramp signal generator circuitry is different from the adjustable ramp capacitance in the second inverse ramp signal generator circuitry.

19. The RF transmitter section of claim 17 wherein the adjustable ramp capacitance in the first inverse ramp signal generator circuitry and the adjustable ramp capacitance in the second inverse ramp signal generator circuitry are adjusted based on the magnitude of the supply voltage.

20. The RF transmitter section of claim 17 wherein the temperature dependent current source in the first inverse ramp signal generator circuitry and the temperature dependent current source in the second inverse ramp signal generator circuitry are proportional to absolute temperature (PTAT) current sources.