Integrated device for temporal binning of received photons

• US 9,696,258 B2
• Filed: 09/09/2016
• Issued: 07/04/2017
• Est. Priority Date: 08/08/2014
• Status: Active Grant

• Current Assignee: Quantum-Si Incorporated
• Original Assignee: Quantum-Si Incorporated
• Inventors: Fife, Keith G., Boisvert, David, Rothberg, Jonathan M.
• Primary Examiner(s): LUU, THANH X
• Application Number:
  US15/261,724
• Publication Number:
  US 20160380025A1
• Time in Patent Office: 298 Days
• CPC Class Codes: C12Q 1/6869 Methods for sequencing
• CPC Class Codes: G01N 2021/6439 with indicators, stains, dyes, tags, labels, marks
• CPC Class Codes: G01N 2021/6441 with two or more labels
• CPC Class Codes: G01N 21/6408 with measurement of decay time, time resolved fluorescence
• CPC Class Codes: G01N 21/6428 Measuring fluorescence of fluorescent products of reactions or of fluorochrome labelled reactive substances, e.g. measuring quenching effects, using measuring "optrodes" in vivo A61B5/00; immunoassay G01N33/53
• CPC Class Codes: G01N 21/645 Specially adapted constructive features of fluorimeters
• CPC Class Codes: G01N 21/6458 Fluorescence microscopy fluorescence microscopes per se G02B21/0076 and G02B21/16
• CPC Class Codes: G01N 2201/06113 Coherent sources; lasers
• CPC Class Codes: G01N 2201/0697 Pulsed lasers
• CPC Class Codes: G01S 17/894 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: G01S 7/4865 Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak peak detection in noise, signal conditioning G01S7/487
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/14812 Special geometry or disposition of pixel-elements, address lines or gate-electrodes

Abstract

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Claims

1. An integrated circuit, comprising:

a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;

at least one charge carrier storage region; and

a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced,

wherein the charge carrier segregation structure comprises;

a charge carrier travel region configured to receive the plurality of charge carriers from the photodetection region, the charge carrier travel region comprising a semiconductor material; and

a plurality of electrodes,

wherein the integrated circuit further comprises a control circuit configured to capture the charge carriers in the charge carrier travel region by changing a voltage of one or more electrodes of the plurality of electrodes, and

wherein the control circuit is configured to capture a charge carrier by;

producing a potential barrier at a first location within the charge carrier travel region by changing a voltage of a first electrode of the plurality of electrodes; and

producing a second potential barrier at a second location within the charge carrier travel region by changing a voltage of a second electrode of the plurality of electrodes.

2. The integrated circuit of claim 1, wherein control circuit is configured to change the voltage of the first electrode at a first time and to change the voltage of the second electrode at a second time after the first time.

3. The integrated circuit of claim 2, wherein the control circuit is configured to produce a third potential barrier at a third location within the charge carrier travel region by changing a voltage of a third electrode of the plurality of electrodes.

4. The integrated circuit of claim 3, wherein the control circuit is configured to change the voltage of the third electrode at a third time after the second time.

5. The integrated circuit of claim 1, wherein the control circuit is configured to control the charge carrier segregation structure to perform a measurement a plurality of times to aggregate the charge carriers in the at least one charge carrier storage region.

6. The integrated circuit of claim 5, wherein the control circuit is configured to perform the measurement based on a timing of excitation light pulses, and wherein the charge carriers are produced in time periods in which the excitation light pulses are absent.

7. An integrated circuit, comprising:

a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;

at least one charge carrier storage region;

a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced; and

a control circuit configured to control the charge carrier segregation structure to perform a first measurement, the first measurement comprising;

a first charge carrier capture phase in which the charge carrier segregation structure forms at least one potential barrier; and

after the first charge carrier capture phase, a first charge carrier transfer phase in which a charge carrier, if captured during the charge carrier capture phase, is transferred to the at least one charge carrier storage region,

wherein the control circuit is configured to perform the measurement based on a timing of a first excitation light pulse and to control the charge carrier segregation structure to discard charge carriers produced in response to photons from the first excitation light pulse,

wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions, and wherein the charge carrier segregation structure is configured to direct the charge carriers into respective charge carrier storage regions of the plurality of charge carrier storage regions based upon times at which the charge carriers are produced,

wherein the first charge carrier transfer phase transfers a carrier captured in the first charge carrier capture phase to a first corresponding storage region of the plurality of charge carrier storage regions;

wherein the control circuit is further configured to control the charge carrier segregation structure to perform a second measurement, the second measurement comprising;

a second charge carrier capture phase in which the charge carrier segregation structure forms at least one second potential barrier; and

after the second charge carrier capture phase, a second charge carrier transfer phase in which a charge carrier is transferred to the at least one charge carrier storage region,

wherein the second charge carrier transfer phase transfers a carrier captured in the second charge carrier capture phase to a second corresponding storage region of the plurality of charge carrier storage regions,

wherein the control circuit is configured to perform the second measurement based on a timing of a second excitation light pulse.

8. The integrated circuit of claim 7, wherein the control circuit is configured to control the charge carrier segregation structure to perform the measurement a plurality of times to aggregate charge carriers in the at least one charge carrier storage region.

9. The integrated circuit of claim 8, wherein the control circuit is configured to perform the measurement based on a timing of excitation light pulses, and wherein the charge carriers are produced in time periods in which the excitation light pulses are absent.

10. The integrated circuit of claim 9, wherein the plurality of times is at least one million times.

11. The integrated circuit of claim 10, wherein the plurality of measurements is performed in less than 50 milliseconds.

12. The integrated circuit of claim 11, wherein the plurality of measurements is performed in greater than one millisecond.

13. The integrated circuit of claim 8, wherein the plurality of times is at least one thousand times.

14. The integrated circuit of claim 7, wherein the control circuit is configured to control the charge carrier segregation structure to perform each of the first and second measurements a plurality of times to aggregate charge carriers in the plurality of charge carrier storage regions.

15. The integrated circuit of claim 14, wherein the control circuit is configured to alternate between controlling the charge carrier segregation structure to perform the first measurement and controlling the charge carrier segregation structure to perform the second measurement.

16. The integrated circuit of claim 14, wherein the plurality of times is at least one thousand times.

17. An integrated circuit, comprising:

a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;

a plurality of charge carrier storage regions;

a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into respective charge carrier storage regions of the plurality of charge carrier storage regions based upon times at which the charge carriers are produced;

a control circuit configured to control the charge carrier segregation structure to perform a measurement, the measurement comprising;

a charge carrier capture phase in which the charge carrier segregation structure forms at least one potential barrier; and

after the charge carrier capture phase, a charge carrier transfer phase in which a charge carrier, if captured during the charge carrier capture phase, is transferred to one of the plurality of charge carrier storage regions,

wherein the control circuit is configured to control the charge carrier segregation structure to perform the measurement a plurality of times to aggregate charge carriers in the respective charge carrier storage regions of the plurality of charge carrier storage regions,

wherein the integrated circuit further comprises a readout circuit configured to read out signals from the plurality of charge carrier storage regions, wherein the control circuit is configured to control the readout circuit to read out signals from plurality of charge carrier storage regions after performing the measurement the plurality of times.

18. The integrated circuit of claim 17, wherein the control circuit is configured to perform the measurement based on a timing of excitation light pulses, and wherein the charge carriers are produced in time periods in which the excitation light pulses are absent.

19. An integrated circuit, comprising:

a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;

at least one charge carrier storage region;

a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced,

a control circuit configured to control the charge carrier segregation structure to perform a measurement, the measurement comprising;

a charge carrier capture phase in which the charge carrier segregation structure forms at least one potential barrier; and

after the charge carrier capture phase, a charge carrier transfer phase in which a charge carrier, if captured during the charge carrier capture phase, is transferred to the at least one charge carrier storage region,

wherein the control circuit is configured to control the charge carrier segregation structure to change a timing, duration and/or number of time bins corresponding to the at least one charge carrier storage region.

20. The integrated circuit of claim 19, wherein the control circuit is configured to control the charge carrier segregation structure to change any two of the timing, duration and number of time bins corresponding to the at least one charge carrier storage region.

21. The integrated circuit of claim 20, wherein the control circuit is configured to control the charge carrier segregation structure to change the timing, duration and number of time bins corresponding to the at least one charge carrier storage region.

22. The integrated circuit of claim 19, wherein the control circuit is configured to control the charge carrier segregation structure to perform the measurement a plurality of times to aggregate the plurality of charge carriers in the at least one charge carrier storage region.

23. The integrated circuit of claim 22, wherein the control circuit is configured to perform the measurement based on a timing of excitation light pulses, and wherein the plurality of charge carriers are produced in time periods in which the excitation light pulses are absent.

24. The integrated circuit of claim 19, wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions, and wherein the charge carrier segregation structure is configured to direct the charge carriers into respective charge carrier storage regions of the plurality of charge carrier storage regions based upon times at which the charge carriers are produced,

wherein the control circuit is configured to control the charge carrier segregation structure such that the plurality of charge carrier storage regions correspond to a first plurality of time bins during a first plurality of measurements and the plurality of charge carrier storage regions correspond to a second plurality of time bins during a second plurality of measurements.

25. The integrated circuit of claim 24, wherein the second plurality of measurements are after the first plurality of measurements and the second plurality of time bins has a higher time resolution than that of the first plurality of time bins.

26. The integrated circuit of claim 24, wherein the control circuit is configured to analyze a quantity of charge carriers collected during the first plurality of measurements and set a timing of the second plurality of time bins based upon the quantity of charge carriers collected.

27. A photodetection method, comprising:

receiving incident photons; and

selectively directing charge carriers of a plurality of charge carriers produced in response to the incident photons into at least one charge carrier storage region based upon times at which the charge carriers are produced,

wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions, and selectively directing the charge carriers comprises selectively directing the charge carriers into respective charge carrier storage regions of the plurality of charge carrier storage regions,

wherein the selectively directing further comprises capturing the charge carriers in a charge carrier travel region,

by changing a voltage of a first electrode overlying the charge carrier travel region to produce a first potential barrier at a first location within the charge carrier travel region, and by changing a voltage of a second electrode overlying the charge carrier travel region to produce a second potential barrier at a second location within the charge carrier travel region.

28. The photodetection method of claim 27, wherein the selectively directing further comprises changing the voltage of at least one charge transfer electrode to transfer a captured charge carrier to a charge carrier storage region of the plurality of charge carrier storage regions.

29. The photodetection method of claim 28, further comprising reading out signals from the plurality of charge carrier storage regions.

30. The photodetection method of claim 27, wherein the selectively directing is performed over a plurality of measurements, individual measurements of the plurality of measurements comprising:

changing the voltages of the first and second electrodes overlying the charge carrier travel region; and

changing the voltage of at least one charge transfer electrode to transfer any captured charge carrier into a charge carrier storage region of the plurality of charge carrier storage regions,

wherein the method further comprises reading out signals from the plurality of charge carrier storage regions after the plurality of measurements.

31. The photodetection method of claim 30, wherein the plurality of measurements comprises at least one thousand measurements.

32. The photodetection method of claim 31, wherein the plurality of measurements comprises at least one million measurements.

33. The photodetection method of claim 27, wherein the incident photons are received subsequent to providing an excitation light pulse.

34. The photodetection method of claim 33, wherein the charge carriers are produced in a time period in which the excitation light pulse is absent.

35. The photodetection method of claim 27, further comprising aggregating the charge carriers in the at least one charge carrier storage region.