Test circuit and method for semiconductor device

• US 9,702,931 B2
• Filed: 10/22/2013
• Issued: 07/11/2017
• Est. Priority Date: 06/18/2013
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: Lee, Dong-Uk
• Primary Examiner(s): Assouad, Patrick
• Assistant Examiner(s): Yodichkas, Khristopher
• Application Number:
  US14/060,198
• Publication Number:
  US 20140368224A1
• Time in Patent Office: 1,358 Days
• Field of Search: 324691, 324704-725
• CPC Class Codes: G01R 27/205 Measuring contact resistance of connections, e.g. of earth connections
• CPC Class Codes: G01R 31/31717 Interconnect testing by scan techniques see G01R31/31855
• CPC Class Codes: G01R 31/318513 Test of Multi-Chip-Moduls
• CPC Class Codes: G11C 29/025 in signal lines
• CPC Class Codes: G11C 29/50008 of impedance
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633

Abstract

A semiconductor device includes a first die, a second die coupled to the first die through a Through-Silicon-Via (TSV), and a test circuit suitable for measuring a resistance of the TSV by controlling an amount of current flowing through the TSV.

Claims

1. A semiconductor device comprising:

a first die;

a second die coupled to the first die through a Through-Silicon-Via (TSV); and

a test circuit configured to generate measured values to be used in obtaining a resistance of the TSV by controlling an amount of current flowing through the TSV,

wherein the test circuit includes;

a current source included in the second die and configured to supply a plurality of variable currents flowing through the TSV in response to a plurality of control signals; and

a measuring block configured to generate the measured values to be used in obtaining the resistance of the TSV based on the plurality of variable currents, wherein the measuring block measures at least one current among the plurality of variable currents, measures a sum of the plurality of variable currents through the TSV, and generates the measured values corresponding to the at least one current and the sum of the plurality of variable currents to be used in obtaining the resistance of the TSV based on a difference between the at least one current and the sum of the plurality of variable currents.

2. The semiconductor device of claim 1, wherein the measuring block includes:

a current sink unit configured to generate a first voltage having a level that depends on the at least one current and a second voltage having a level that depends on the sum of the plurality of variable currents in response to the plurality of control signals; and

a measuring unit configured to output the measured values corresponding to the first and second voltages to be used in obtaining the resistance of the TSV based on the measurement voltage.

3. The semiconductor device of claim 2, wherein the measuring unit includes:

a voltage measurer configured to output the first and second voltages as the measured values; and

a current measurer configured to convert the first and second voltages to first and second currents and output the first and second currents as the measured values.

4. The semiconductor device of claim 3, wherein the current measurer includes an offset canceller configured to remove an offset of the first and second voltages.

5. The semiconductor device of claim 1, wherein the measuring block is disposed in the first die.

6. A semiconductor device comprising:

a first die;

a plurality of second dies, each of which is coupled to the first die through a Through-Silicon-Via (TSV);

a current source configured to supply a first current in response to a first control signal and supply a second current in response to a second control signal, wherein the first current and the second current flows through the TSV, and the current source is disposed in each of the second dies;

a current sink configured to generate a measurement voltage having a level that depends on the first current or depends on both of the first current and the second current, wherein the current sink is disposed in the first die; and

a measurer configured to output a measured value to be used in obtaining a resistance of the TSV based on the measurement voltage,

wherein the current sink unit generates a first measurement voltage representing the first current through the TSV and generates a second measurement voltage representing a sum of the first and second currents through the TSV, and the measuring unit outputs a measured value corresponding to the first or second voltage to be used in obtaining the resistance of the TSV based on a difference between the first current and the sum of the first and second currents.

7. The semiconductor device of claim 6, wherein the current sink includes:

a first current sink configured to generate the first measurement voltage corresponding to the first current in response to the first control signal; and

a second current sink which generates the second measurement voltage corresponding to the second current in response to the second control signal.

8. The semiconductor device of claim 6, wherein the measurer includes:

a voltage measurer configured to output the first or second measurement voltage as the measured value; and

a current measurer configured to convert the first or second measurement voltage into a converted current and output the converted current as the measured value.

9. The semiconductor device of claim 8, wherein the current measurer includes an offset canceller which removes an offset of the first or second measurement voltage.

10. The semiconductor device of claim 6, wherein the current sink comprises a number of current sinks and the number of current sinks corresponds with the number of the second dies.

11. The semiconductor device of claim 6, wherein the measurer includes:

a switch which selects the first and second measurement voltages corresponding to the first and second currents flowing through a target TSV to be measured among the TSVs corresponding to the second dies.

12. A method for measuring a resistance of a Through-Silicon-Via (TSV) in a semiconductor device including a first die and a second die that are electrically connected to each other through the TSV, the method comprising:

supplying a first current to the first die from the second die through the TSV;

measuring the first current through the TSV at the first die;

supplying the first current and a second current to the first die from the second die through the TSV;

measuring a sum of the first and the second current through the TSV at the first die; and

outputting a measured value corresponding to the measured first current and the measured sum of the first and second currents to be used in obtaining the resistance of the TSV based on a difference between the measured first current and the measured sum of the first and second current.

13. The method of claim 12, wherein the measuring of the first current through the TSV at the first die and the measuring of the second current through the TSV at the first die include:

measuring a first voltage corresponding to the first current as the measured first current and a second voltage corresponding to the sum of the first and second currents as the measured sum of the first and second currents.