Method of detecting erase fail word-line in non-volatile memory device
First Claim
1. A method of operating a non-volatile memory device, including a plurality of cell strings, each of the cell strings including a plurality of memory cells, the method comprising:
- supplying an erase voltage to the memory cells of each of the cell strings;
performing a first read operation by applying a first verify voltage to even word-lines connected to the memory cells of each of the cell strings and applying a high voltage to odd word-lines connected to the memory cells of each of the cell strings;
performing a second read operation by applying the first verify voltage to the odd word-lines connected to the memory cells of each of the cell strings and applying the high voltage to the even word-lines connected to the memory cells of each of the cell strings; and
performing a first erase verify operation by performing a first exclusive-or (XOR) operation on a result of the first read operation and a result of the second read operation.
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Abstract
A method for operating a non-volatile memory device initially includes supplying an erase voltage to the memory cells. The memory cells are in cell strings in a three-dimensional structure. The method further includes performing a first read operation of the memory cells, performing a second read operation of the memory cells, and then performing a first erase verify operation based on results of the first and second read operations. The first erase verify operation may include performing a first exclusive-or (XOR) operation on the first and second read operation results.
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Citations
20 Claims
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1. A method of operating a non-volatile memory device, including a plurality of cell strings, each of the cell strings including a plurality of memory cells, the method comprising:
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supplying an erase voltage to the memory cells of each of the cell strings; performing a first read operation by applying a first verify voltage to even word-lines connected to the memory cells of each of the cell strings and applying a high voltage to odd word-lines connected to the memory cells of each of the cell strings; performing a second read operation by applying the first verify voltage to the odd word-lines connected to the memory cells of each of the cell strings and applying the high voltage to the even word-lines connected to the memory cells of each of the cell strings; and performing a first erase verify operation by performing a first exclusive-or (XOR) operation on a result of the first read operation and a result of the second read operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of operating a non-volatile memory device, including a plurality of cell strings on a substrate, each of the cell strings including a plurality of memory cells stacked in a direction perpendicular to the substrate, the method comprising:
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supplying an erase voltage to the memory cells of each of the cell strings; performing a first erase verify operation by applying a high voltage to word-lines connected to the memory cells of each of the cell strings; with respect to the cell strings determined as an erase pass, as a result of the first erase verify operation, performing a first read operation by applying a first verify voltage to even word-lines of the word-lines connected to the memory cells and applying the high voltage to odd word-lines of the word-lines connected to the memory cells; performing a second read operation by applying the first verify voltage to the odd word-lines of the word-lines connected to the memory cells and applying the high voltage to the even word-lines of the word-lines connected to the memory cells; and performing a second erase verify operation by performing a first exclusive-or (XOR) operation on a result of the first read operation and a result of the second read operation. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A method for controlling a non-volatile memory, the method comprising:
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performing a first read operation including applying a first voltage to a first number of word lines connected to a plurality of memory cells, and applying a second voltage to a second number of word lines connected to the memory cells; performing a second read operation including applying the first voltage to the second number of word lines, and applying the second voltage to the first number of word lines; and detecting an erase fail word-line based on results of the first and second read operations, wherein the first voltage is different from the second voltage. - View Dependent Claims (17, 18, 19, 20)
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Specification