Crack-tolerant photovoltaic cell structure and fabrication method

• US 9,705,013 B2
• Filed: 11/10/2015
• Issued: 07/11/2017
• Est. Priority Date: 11/10/2015
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hekmatshoartabari, Bahman, Li, Ning, Saenger, Katherine L.
• Primary Examiner(s): Smith, Eric R
• Application Number:
  US14/936,900
• Publication Number:
  US 20170133523A1
• Time in Patent Office: 609 Days
• CPC Class Codes: H01L 31/02167 for solar cells
• CPC Class Codes: H01L 31/022425 for solar cells
• CPC Class Codes: H01L 31/022441 Electrode arrangements specially adapted for back-contact solar cells
• CPC Class Codes: H01L 31/028 including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/03921 including only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/0445 including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: H01L 31/0745 comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/186 Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
• CPC Class Codes: H01L 31/1868 Passivation
• CPC Class Codes: H02S 50/10 Testing of PV devices, e.g. of PV modules or single PV cells testing of semiconductor devices during manufacturing H01L22/00
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

After forming an absorber layer containing cracks over a back contact layer, a passivation layer is formed over a top surface of the absorber layer and interior surfaces of the cracks. The passivation layer is deposited in a manner such that that the cracks in the absorber layer are fully passivated by the passivation layer. An emitter layer is then formed over the passivation layer to pinch off upper portions of the cracks, leaving voids in lower portions of the cracks.

Claims

1. A photovoltaic device comprising:

an absorber layer located over a back contact layer, wherein the absorber layer comprises at least one crack;

a passivation layer located over a top surface of the absorber layer and an entire interior surface of the at least one crack; and

an emitter layer located over a portion of the passivation layer that is located over the top surface of the absorber layer and another portion of the passivation layer that is located in an upper portion of the at least one crack, wherein the emitter layer pinches off the at least one crack such that a void is present between the emitter layer and the passivation layer within the at least one crack, wherein the emitter layer protrudes into the at least one crack.

2. The photovoltaic device of claim 1, wherein the at least one crack extends through an entire thickness of the absorber layer, the at least one crack exposing the back contact layer.

3. The photovoltaic device of claim 2, wherein the void is located between the emitter layer and a bottom portion of the passivation layer that is in direct contact with the back contact layer.

4. The photovoltaic device of claim 1, wherein the absorber layer comprises a first semiconductor material of a first conductivity type, and the emitter layer comprises a second semiconductor material of a second conductivity type opposite the first conductivity type.

5. The photovoltaic device of claim 4, wherein the first conductivity type is p-type and the second conductivity type is n-type, or the first conductivity type is n-type and the second conductivity type is p-type.

6. The photovoltaic device of claim 5, wherein the absorber layer comprises p-doped silicon, and the emitter layer comprises n-doped hydrogenated silicon.

7. The photovoltaic device of claim 1, wherein the passivation layer comprises an intrinsic semiconductor material.

8. The photovoltaic device of claim 7, wherein the passivation layer comprises intrinsic hydrogenated silicon.

9. The photovoltaic device of claim 1, further comprising a front contact located over the emitter layer.

10. The photovoltaic device of claim 9, wherein the front contact is a finger line that fills at least a portion of the at least one crack.

11. The photovoltaic device of claim 9, wherein the front contact comprises Al paste, Ag paste or AlAg paste.

12. The photovoltaic device of claim 1, further comprising a substrate over which the back contact layer is located.

13. The photovoltaic device of claim 12, wherein the substrate comprises glass, a polymer or a metal foil.

14. The photovoltaic device of claim 1, wherein the back contact layer comprises Mo, Cu, Al, Ti, Ni, Nb, W or Cr.

15. The photovoltaic device of claim 1, wherein the back contact layer comprises a plurality of metal contacts embedded in a dielectric layer.

16. The photovoltaic device of claim 1, wherein the at least one crack extends into an upper portion of the absorber layer.