Fault tolerant power supply incorporating intelligent gate driver-switch circuit to provide uninterrupted power

• US 9,705,395 B2
• Filed: 07/07/2015
• Issued: 07/11/2017
• Est. Priority Date: 03/12/2013
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Chang, Allen, Tomas, Mark, Lee, Gilbert, Zhang, Zhiye, Chang, Kuang Ming
• Primary Examiner(s): Behm, Harry
• Assistant Examiner(s): NOVAK, PETER MICHAEL
• Application Number:
  US14/792,965
• Publication Number:
  US 20150311780A1
• Time in Patent Office: 735 Days
• CPC Class Codes: H02H 7/1225 responsive to internal faults, e.g. shoot-through avoiding shoot-through H02M1/38
• CPC Class Codes: H02H 9/02 responsive to excess current current limitation for voltage regulators G05F1/573; disconnection after limiting H02H3/025
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A fault tolerant power supply system includes at least one load switch configured to connect an input voltage to an output node of the load switch when the load switch is turned on and at least one power channel coupled to the load switch to receive the input voltage. The power channel is configured as a buck converter and includes at least a high-side power switch and a low-side power switch. The fault tolerant power supply system is configured to measure a current flowing through the low-side power switch, to determine that the current flowing through the low-side power switch has exceeded a current limit threshold, and to disable the low-side power switch and the load switch in response to the determination that the current flowing in the low-side power switch has exceeded the current limit threshold.

Claims

1. A fault tolerant power supply system, the power supply system receiving an input voltage and generating an output voltage on an output voltage node, the power supply system comprising:

a load switch having an input node coupled to the input voltage and an output node, the load switch providing the input voltage on the output node in response to the load switch being turned on and the load switch disconnecting the input voltage from the output node in response to the load switch being turned off, the load switch comprising a main switch connected between the input node and the output node and controlled by a control terminal and a turn-off circuit configured to drive the control terminal of the main switch;

a plurality of power channels, each power channel having an input terminal coupled to the output node of the load switch and an output terminal coupled to the output voltage node of the power supply system, each power channel comprising a driver circuit, a high-side power switch and a low-side power switch connected in series, and an output inductor; and

an output capacitor connected between the output voltage node and a ground potential, each power channel and the output capacitor forming a buck converter,

wherein each power channel of the plurality of power channels further comprises a current sense circuit to measure a current flowing in the low-side power switch of the respective power channel, the current sense circuit being configured to generate a first output signal having a first state in response to the current flowing in the low-side power switch having a peak current value exceeding a current limit threshold, the first output signal being coupled to the driver circuit of the respective power channel to disable the low-side power switch of that power channel in response to the first output signal having the first state, the first output signal further being coupled to the turn off circuit of the load switch to turn off the load switch in response to the first output signal having the first state.

2. The fault tolerant power supply system of claim 1, wherein the load switch comprises a rapid switch turn-off circuit as the turn-off circuit, the rapid switch turn-off circuit configured to receive the first output signal and to drive the control terminal of the main switch to turn off the main switch in response to the first output signal having the first state.

3. The fault tolerant power supply system of claim 2, wherein the rapid switch turn-off circuit comprises a driver capable of turning off the main switch within a time duration to avoid damage to the power supply system.

4. The fault tolerant power supply system of claim 2, wherein the rapid switch turn-off circuit comprises a driver capable of turning off the main switch within a time duration in the nano-seconds range.

5. The fault tolerant power supply system of claim 1, wherein the output capacitor comprises a single output capacitor coupled to the output voltage node.

6. The fault tolerant power supply system of claim 1, wherein the current sense circuit in each power channel comprises:

a peak current detector coupled to the low-side power switch and configured to measure a current flowing through the low-side power switch and to generate an output signal indicative of a peak current value of the current flowing through the low-side power switch; and

a comparator configured to compare the output signal of the peak current detector to the current limit threshold, the comparator generating the first output signal having the first state in response to the output signal of the peak current detector exceeding the current limit threshold.

7. The fault tolerant power supply system of claim 1, wherein the first output signal comprises an active high signal and the first state comprises a logical high state, each power channel of the plurality of power channels further comprises:

an open-drain NMOS transistor having a gate terminal coupled to the first output signal, a source terminal coupled to the ground potential, and a drain terminal providing a second output signal, the second output signal of each power channel being coupled to the turn-off circuit of the load switch to turn off the load switch in response to the first output signal having the first state.

8. The fault tolerant power supply system of claim 1, wherein the high-side power switch and the low-side power switch comprise MOS transistors.

9. The fault tolerant power supply system of claim 1, further comprising:

a multi-phase controller configured to generate control signals for the plurality of power channels to control the duty cycle of the power channels.

10. The fault tolerant power supply system of claim 1, wherein the load switch further comprises a first driver driving the control terminal of the main switch and a switch control circuit controlling the first driver and being configured to turn on or off the main switch in response to control signals of the power supply system.

11. A method in a power supply system, the power supply system receiving an input voltage and generating an output voltage on an output voltage node, the method comprising:

providing a load switch having an input node coupled to the input voltage and an output node, the load switch providing the input voltage on the output node in response to the load switch being turned on and the load switch disconnecting the input voltage from the output node in response to the load switch being turned off, the load switch comprising a main switch connected between the input node and the output node and controlled by a control terminal and a turn-off circuit configured to drive the control terminal of the main switch;

providing a plurality of power channels, each power channel having an input terminal coupled to the output node of the load switch and an output terminal coupled to the output voltage node of the power supply system, each power channel being configured as a buck converter and including at least a high-side power switch and a low-side power switch connected in series;

measuring, at each power channel, a current flowing through the low-side power switch;

determining, at each power channel, that the current flowing through the low-side power switch has exceeded a current limit threshold; and

in response to the determining that the current flowing through the low-side power switch of a respective power channel having exceeded the current limit threshold, disabling the low-side power switch of the respective power channel and the load, wherein disabling the load switch in response to the determining comprises driving the control terminal of the main switch using the turn-off circuit to turn off the main switch in response to the determining.

12. The method of claim 11, wherein disabling the load switch comprises:

turning off the load switch in response to the determining to disconnect the input voltage from the output node of the load switch.

13. The method of claim 12, wherein disabling the load switch in response to the determining comprises:

turning off the load switch in response to the determining within a time duration to avoid damage to the power supply system.

14. The method of claim 12, wherein disabling the load switch in response to the determining comprises:

turning off the load switch in response to the determining within a time duration in the nano-seconds range.

15. The method of claim 11, wherein measuring, at each power channel, a current flowing through the low-side power switch comprises:

measuring, at each power channel, a peak current value of the current flowing through the low-side power switch; and

generating an output signal indicative of the peak current value.

16. The method of claim 15, wherein determining, at each power channel, that the current flowing through the low-side power switch has exceeded a current limit threshold comprises:

comparing the output signal indicative of the peak current value to the current limit threshold.