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Separate N and P fin etching for reduced CMOS device leakage

  • US 9,711,507 B1
  • Filed: 09/30/2016
  • Issued: 07/18/2017
  • Est. Priority Date: 09/30/2016
  • Status: Active Grant
First Claim
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1. A method for forming a semiconductor device, the method comprising:

  • blocking a first region of a wafer;

    forming a plurality of fins in a second region of the wafer;

    depositing a conformal mask layer over the plurality of fins in the second region;

    unblocking the first region of the wafer;

    blocking the second region of the wafer;

    forming a plurality of fins in the first region of the wafer;

    unblocking the second region of the wafer; and

    removing the conformal mask layer.

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