Semiconductor device

• US 9,711,635 B1
• Filed: 03/23/2016
• Issued: 07/18/2017
• Est. Priority Date: 03/23/2016
• Status: Expired due to Fees

• Current Assignee: Sanken Electric Company Limited
• Original Assignee: Sanken Electric Company Limited
• Inventors: Kondo, Taro
• Primary Examiner(s): Wilson, Allan R
• Application Number:
  US15/079,003
• Time in Patent Office: 482 Days
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/4175 for lateral devices where the connection to the source or drain region is done through at least one part of the semiconductor substrate thickness, e.g. with connecting sink or with via-hole
• CPC Class Codes: H01L 29/7816 Lateral DMOS transistors, i.e. LDMOS transistors

Abstract

A semiconductor device includes: a first semiconductor layer formed at a surface of a semiconductor substrate; an insulating layer formed on the surface of the semiconductor substrate; a first electrode that is electrically connected to the first semiconductor layer; a second semiconductor layer formed to a surface of a region, which is adjacent to the first semiconductor layer; a second electrode formed above a part of the second semiconductor layer; a third semiconductor layer adjacent to the second semiconductor layer in the one direction; a fourth semiconductor layer formed to a surface of a region, which is adjacent to the third semiconductor layer in the one direction; a third electrode that is electrically connected to the fourth semiconductor layer; and a conductor that is separated from the second electrode in the one direction and is kept at the same potential as the first electrode.

Claims

1. A semiconductor device comprising:

a first semiconductor layer that has a first conductivity type and is formed at a surface of a semiconductor substrate;

an insulating layer that is formed on the surface of the semiconductor substrate;

a first electrode that is electrically connected to the first semiconductor layer;

a second semiconductor layer that has a second conductivity type opposite to the first conductivity type and is formed from a first region, which is adjacent to the first semiconductor layer in the semiconductor substrate in a depth direction perpendicular to the surface of the semiconductor substrate, to a second region, which is in contact with the surface of the semiconductor substrate and is adjacent to the first semiconductor layer in one direction parallel to the surface of the semiconductor substrate;

a second electrode that is formed above a part of the second semiconductor layer, which is exposed to the insulating layer at the surface of the semiconductor substrate, with the insulating layer interposed therebetween;

a third semiconductor layer that has the first conductivity type and is formed from a third region, which is adjacent to the second semiconductor layer in the depth direction, to a fourth region, which is in contact with the surface of the semiconductor substrate and is adjacent to the second semiconductor layer in the one direction;

a fourth semiconductor layer that has the first conductivity type with an impurity concentration higher than that of the third semiconductor layer and is formed from a fifth region, which is adjacent to the third semiconductor layer in the depth direction, to a sixth region, which is in contact with the surface of the semiconductor substrate and is adjacent to the third semiconductor layer in the one direction;

a third electrode that is electrically connected to the fourth semiconductor layer at a position closer to a back surface of the semiconductor substrate than an end portion of the third semiconductor layer on a back surface side of the semiconductor substrate in the depth direction; and

a conductor that is separated from the second electrode in the one direction, is formed above a part of the third semiconductor layer, which is exposed to the insulating layer at the surface of the semiconductor substrate, with an insulating layer interposed therebetween, and is kept at the same potential as the first electrode,

wherein the third semiconductor layer includes a first impurity region, which is in contact with the surface of the semiconductor substrate and is separated from the second semiconductor layer in the one direction, and a second impurity region, a part of which is in contact with the surface of the semiconductor substrate and is provided between the second region of the second semiconductor layer and the first impurity region,

wherein the first impurity region has an impurity concentration higher than an impurity concentration of the second impurity region, and

wherein a width of the second electrode in the one direction is less than a width of the first impurity region in the one direction.

2. The semiconductor device according to claim 1, wherein a thickness of the insulating layer between the conductor and the semiconductor substrate is larger than a thickness of the insulating layer between the second electrode and the semiconductor substrate.

3. The semiconductor device according to claim 1, wherein a distance between the second electrode and the conductor in the one direction is larger than a thickness of the insulating layer between the second electrode and the semiconductor substrate.

4. The semiconductor device according to claim 1, wherein a distance between the conductor and the part of the fourth semiconductor layer, which is exposed to the insulating layer at the surface of the semiconductor substrate, in the one direction is larger than a distance between the second electrode and the conductor in the one direction.

5. The semiconductor device according to claim 1,

wherein the fourth semiconductor layer includes a plurality of regions having different impurity concentrations,

wherein an impurity region extending in the depth direction from the surface of the semiconductor substrate is formed in the fourth semiconductor layer adjacent to the third semiconductor layer in the one direction, and

wherein the impurity concentration of the impurity region is higher than the impurity concentration of the regions of the fourth semiconductor layer other than the impurity region.

6. The semiconductor device according to claim 5, wherein the impurity region is made of polysilicon.

7. The semiconductor device according to claim 1, wherein the second electrode is located within a range of the first impurity region in the one direction.

8. The semiconductor device according to claim 1, wherein a highest impurity concentration in the third semiconductor layer is lower than a lowest impurity concentration in the fourth semiconductor layer.

9. The semiconductor device according to claim 1, wherein the second electrode is not overlapped with the conductor in the depth direction perpendicular to the surface of the semiconductor substrate.

10. The semiconductor device according to claim 1, wherein a distance between the conductor and the first electrode in the one direction is larger than a distance between the second electrode and the conductor in the one direction.