Method of fabricating semiconductor device using gang bonding and semiconductor device fabricated by the same

• US 9,711,693 B2
• Filed: 06/04/2015
• Issued: 07/18/2017
• Est. Priority Date: 12/10/2010
• Status: Active Grant

• Current Assignee: Chung Hoon Lee, Dae Sung Kal, Ki Bum Nam
• Original Assignee: Chung Hoon Lee, Dae Sung Kal, Ki Bum Nam
• Inventors: Kal, Dae Sung, Lee, Chung Hoon, Nam, Ki Bum
• Primary Examiner(s): Luke, Daniel
• Application Number:
  US14/731,046
• Publication Number:
  US 20150270454A1
• Time in Patent Office: 775 Days
• CPC Class Codes: H01L 2224/04026 Bonding areas specifically adapted for layer connectors
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/06151 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/16013 the bump connector being larger than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/16057 in side view
• CPC Class Codes: H01L 2224/16151 the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
• CPC Class Codes: H01L 2224/27462 Electroplating
• CPC Class Codes: H01L 2224/32238 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/325 Material
• CPC Class Codes: H01L 2224/33151 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/81893 Anodic bonding, i.e. bonding by applying a voltage across the interface in order to induce ions migration leading to an irreversible chemical bond
• CPC Class Codes: H01L 2224/83447 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/83455 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/83893 : Anodic bonding, i.e. bonding by applying a voltage across the interface in order to induce ions migration leading to an irreversible chemical bond
• CPC Class Codes: H01L 2224/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/49805 : the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/33 : of a plurality of layer connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2933/0033 : relating to semiconductor body packages
• CPC Class Codes: H01L 33/005 : Processes
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 : Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/36 : characterised by the electrodes
• CPC Class Codes: H01L 33/44 : characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/50 : Wavelength conversion elements
• CPC Class Codes: H01L 33/507 : the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body

Abstract

A semiconductor device including a first lead electrode and a second lead electrode; a semiconductor stack structure disposed on the member, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a plating layer configured to bond the semiconductor stack structure to the member; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.

Claims

1. A semiconductor device, comprising:

a member comprising a first lead electrode and a second lead electrode;

a semiconductor stack structure disposed on the member, the semiconductor stack structure comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers;

a first electrode electrically connected to the first conductive semiconductor layer;

a second electrode electrically connected to the second conductive semiconductor layer;

a plating layer configured to bond the semiconductor stack structure to the member;

spacer electrodes respectively disposed on the first and second lead electrodes; and

a first wavelength converter that covers at least side surfaces of the semiconductor stack structure,

wherein the first electrode comprises a first electrode pad and a first additional electrode disposed on the first electrode pad,

wherein the second electrode comprises a second electrode pad and a second additional electrode disposed on the second electrode pad,

wherein the plating layer comprises a first plating layer configured to bond the first additional electrode to the spacer electrode on the first lead electrode, and a second plating layer configured to bond the second additional electrode to the spacer electrode on the second lead electrode,

wherein the first wavelength converter extends to a space between the semiconductor stack structure and the member and covers the semiconductor stack structure,

and

wherein the first and second plating layers cover a top surface and only a portion of respective side surfaces of the spacer electrodes.

2. The semiconductor device of claim 1, further comprising a second wavelength converter having a uniform thickness and disposed on an upper surface of the semiconductor stack structure opposite to the member.

3. The semiconductor device of claim 2, wherein the first wavelength converter and the second wavelength converter are spaced apart from each other.

4. The semiconductor device of claim 2, wherein the second wavelength converter contacts the first conductive semiconductor layer.

5. The semiconductor device of claim 2, further comprising a growth substrate disposed on the semiconductor stack structure opposite to the member, wherein the second wavelength converter is disposed on the growth substrate.

6. The semiconductor device of claim 1, wherein the member is a printed circuit board (PCB) or a lead frame.

7. A semiconductor device, comprising:

a member comprising a first lead electrode and a second lead electrode;

a semiconductor stack structure disposed on the member, the semiconductor stack structure comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers;

a first plating layer and a second plating layer configured to bond the semiconductor stack structure to the member;

spacer electrodes respectively disposed on the first and second lead electrodes; and

a first wavelength converter that covers at least side surfaces of the semiconductor stack structure,

wherein the first wavelength converter extends to a space between the semiconductor stack structure and the member and covers the semiconductor stack structure,

wherein the first and second plating layers bond the semiconductor stack structure to the spacer electrodes, respectively, and

wherein the first and second plating layers cover a top surface and only a portion of respective side surfaces of the spacer electrodes.

8. A semiconductor device, comprising:

a member comprising a first lead electrode and a second lead electrode;

a semiconductor stack structure disposed on the member, the semiconductor stack structure comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers;

a first plating layer and a second plating layer configured to bond the semiconductor stack structure to the member;

spacer electrodes respectively disposed on the first and second lead electrodes; and

a second wavelength converter having a uniform thickness and disposed on an upper surface of the semiconductor stack structure opposite to the member,

wherein the first and second plating layers bond the semiconductor stack structure to the spacer electrodes, respectively, and

wherein the first and second plating layers cover a top surface and only a portion of respective side surfaces of the spacer electrodes.

9. The semiconductor device of claim 8, further comprising a first wavelength converter that covers at least side surfaces of the semiconductor stack structure, wherein the first and second wavelength converters are spaced apart from each other.

10. The semiconductor device of claim 8, wherein the second wavelength converter contacts the first conductive semiconductor layer.

11. The semiconductor device of claim 8, further comprising a growth substrate disposed on the semiconductor stack structure opposite to the member, wherein the second wavelength converter is disposed on the growth substrate.