System and method for memory access in server communications

• US 9,712,373 B1
• Filed: 03/12/2013
• Issued: 07/18/2017
• Est. Priority Date: 07/30/2012
• Status: Active Grant

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Haywood, Christopher
• Primary Examiner(s): Parry, Chris
• Assistant Examiner(s): Jahnige, Caroline
• Application Number:
  US13/797,700
• Time in Patent Office: 1,589 Days
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: H04L 41/0806 for initial configuration or provisioning, e.g. plug-and-play
• CPC Class Codes: H04L 41/0895 Configuration of virtualised networks or elements, e.g. virtualised network function or OpenFlow elements
• CPC Class Codes: H04L 69/324 in the data link layer [OSI layer 2], e.g. HDLC

Abstract

Embodiments of the present invention are directed to memories used in server applications. More specifically, embodiments of the present invention provide a server that has memory management module that is connected to the processor using one or more DDR channels. The memory management module is configured to provide the processor local access and network access to memories on a network. There are other embodiments as well.

Claims

1. A server system comprising:

a central processing unit (CPU);

a first memory management module directly coupled to the CPU through at least a first DDR channel, the first memory management module being configured to access one or more network interfaces using a layer 2 protocol and a first plurality of memory modules, the first memory management module being configured to transfer data blocks from the first plurality of memory modules to the CPU, the first memory management module providing a cascade interface to allow a daisy-chain connection to a hybrid memory controller distributed over a network; and

a first network interface comprises a plurality of ports, the first network interface being configured to transfer data blocks to a second network interface, the first memory management module using at least the layer 2 protocol, wherein a second memory management module is configured to access the second network interface using the layer 2 protocol, the second memory management module being configured to receive and transfer the data blocks from the first memory management module to a second plurality of memory modules,

wherein the first memory management module is configured to access one or more hybrid memory blade servers via a hybrid memory aggregation blade and transfer an aggregated data block from the one or more hybrid memory blade servers to the CPU.

2. The server system of claim 1 wherein the first network interface is configured to access the second network interface via PAM format.

3. The server system of claim 1 wherein the first plurality of memory modules comprises solid-state memory.

4. The server system of claim 1 wherein the second memory management module is configured to send data blocks from the first plurality of memory modules.

5. The server system of claim 1 wherein the first plurality of memory modules comprises load-reduce DIMM memory.

6. The server system of claim 1 the first memory management module is configured to route data blocks from the first plurality of memory modules to the second plurality of memory modules.

7. The server system of claim 1 wherein the first plurality of memory modules comprises DIMM memory chips.

8. The server system of claim 1 wherein the first management module is configured to access a forwarding plane of the first network interface via an OpenFlow protocol.

9. The server system of claim 1 wherein the first network interface comprises pulse amplitude modulation (PAM) interface.

10. The server system of claim 1 wherein the first network interface is configured to allocate communication channels to transfer the data blocks from the first memory management module.

11. The server system of claim 1 wherein the first memory module is configured to allocate communication bandwidth for transferring the data blocks.