Wireless communication device

• US 9,713,093 B2
• Filed: 01/18/2016
• Issued: 07/18/2017
• Est. Priority Date: 02/10/2011
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Tu, Li-Chun, Yang, Chia-Hao, Chen, Tsung-Huang
• Primary Examiner(s): Garcia, Santiago
• Application Number:
  US15/000,023
• Publication Number:
  US 20160134324A1
• Time in Patent Office: 547 Days
• Field of Search: 375133
• CPC Class Codes: G06F 3/0625 Power saving in storage systems
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04W 52/0261 managing power supply demand, e.g. depending on battery level
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit and the first memory are placed in a single module.

Claims

1. A wireless communication device, comprising:

an integrated processing circuit, comprising;

a processing unit, capable of processing a wireless communication signal; and

a radio frequency (RF) unit, capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal; and

a first memory, coupled to the integrated processing circuit, the first memory capable of storing data used by the processing unit; and

a testing circuit, coupled to the first memory, the testing circuit capable of testing the first memory for determining if the first memory is an effective memory;

wherein the RF unit and the first memory are placed in a single module.

2. The wireless communication device of claim 1, wherein the first memory comprises:

an identification, capable of indicating that the first memory is an effective memory.

3. The wireless communication device of claim 1, wherein the integrated processing circuit further comprises:

a driving control circuit, capable of adjusting a driving power of a driving signal transmitted between the first memory and the integrated processing circuit.

4. The wireless communication device of claim 3, wherein the driving power is adjusted to a minimum driving power acceptable for transmitting the driving signal between the first memory and the integrated processing circuit.

5. The wireless communication device of claim 1, wherein the integrated processing circuit further comprises:

a frequency control circuit, capable of controlling an operating frequency of the first memory to be different from an oscillating frequency of the radio frequency (RF) signal.

6. The wireless communication device of claim 5, wherein the frequency control circuit is a frequency hopping control circuit.

7. The wireless communication device of claim 1, wherein the integrated processing circuit further comprises:

a frequency control circuit, capable of spreading an operating frequency of the first memory into a specific frequency band.

8. The wireless communication device of claim 7, wherein the frequency control circuit is a spread spectrum control circuit.

9. The wireless communication device of claim 1, wherein the integrated processing circuit further comprises:

a power management unit (PMU), capable of managing power consumption of at least one of the integrated processing circuit and the first memory.

10. The wireless communication device of claim 1, further comprising:

a power management unit (PMU), capable of managing power consumption of at least one of the integrated processing circuit and the first memory;

wherein the power management unit, the integrated processing circuit, and the first memory are packaged in the single module.

11. The wireless communication device of claim 1, further comprising:

a second memory, coupled to the integrated processing circuit.

12. The wireless communication device of claim 11, wherein the first memory is a volatile memory, and the second memory is a non-volatile memory.

13. The wireless communication device of claim 1, wherein the single module is a system-in-package module, a multi package module or a system-in-module.

14. A wireless communication device, comprising:

an integrated processing circuit, comprising a processing unit, capable of processing a wireless communication signal;

a radio frequency (RF) unit, capable of performing a conversion between a radio frequency (RF) signal and a baseband signal;

a first memory, coupled to the integrated processing circuit, the first memory capable of storing data used by the processing unit; and

a testing circuit, coupled to the first memory, the testing circuit capable of testing the first memory for determining if the first memory is an effective memory;

wherein the wireless communication signal is one of the RF signal and the baseband signal, and the RF unit and the first memory are placed in a single module.

15. The wireless communication device of claim 14, wherein the first memory comprises:

an identification, capable of indicating that the first memory is an effective memory.

16. The wireless communication device of claim 14, wherein the integrated processing circuit further comprises:

a frequency control circuit, capable of controlling an operating frequency of the first memory to be different from an oscillating frequency of the radio frequency (RF) signal.

17. The wireless communication device of claim 14, wherein the integrated processing circuit further comprises:

a frequency control circuit, capable of spreading an operating frequency of the first memory into a specific frequency band.

18. The wireless communication device of claim 14, wherein the integrated processing circuit further comprises:

a driving control circuit, capable of adjusting a driving power of a driving signal transmitted between the first memory and the integrated processing circuit.

19. The wireless communication device of claim 18, wherein the driving power is adjusted to a minimum driving power acceptable for transmitting the driving signal between the first memory and the integrated processing circuit.

20. The wireless communication device of claim 14, wherein the single module is a system-in-package module, a multi package module or a system-in-module.