×

Run-time parallelization of code execution based on an approximate register-access specification

  • US 9,715,390 B2
  • Filed: 04/19/2015
  • Issued: 07/25/2017
  • Est. Priority Date: 04/19/2015
  • Status: Active Grant
First Claim
Patent Images

1. A method, comprising:

  • in a processor that processes instructions of program code, processing a first segment of the instructions;

    constructing an approximate specification that defines register access by the instructions in the first segment by indicating for one or more destination registers that a respective number of writes in the first segment to each of the one or more destination registers exceeded a predefined threshold, without specifying the respective number;

    making respective values of the one or more destination registers available to a second segment of the instructions only upon verifying that the values are known to be valid for readout by the second segment even though the approximate specification is not exact in pointing to the instructions that are last to write to the destination registers; and

    processing the second segment at least partially in parallel with processing of the first segment, using the values made available from the first segment.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×