Metal oxide semiconductor (MOS) capacitor with improved linearity
First Claim
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1. An apparatus comprising:
- a main branch comprising a first signal path having a first capacitor pair connected in series with first reversed polarities and a second signal path having a second capacitor pair connected in series with second reversed polarities, the first and second signal paths connected in parallel, wherein the first capacitor pair is configured to receive a first bias voltage, and wherein the second capacitor pair is configured to receive a second bias voltage that is different than the first bias voltage; and
an auxiliary branch comprising at least one signal path having at least one capacitor pair connected in series with third reversed polarities and connected in parallel with the main branch, wherein the first capacitor pair, the second capacitor pair, and the at least one capacitor pair are configured to improve linearity of an analog filter.
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Abstract
A MOS capacitor with improved linearity is disclosed. In an exemplary embodiment, an apparatus includes a main branch comprising a first signal path having a first capacitor pair connected in series with reversed polarities and a second signal path having a second capacitor pair connected in series with reversed polarities, the first and second signal paths connected in parallel. The apparatus also includes an auxiliary branch comprising at least one signal path having at least one capacitor pair connected in series with reversed polarities and connected in parallel with the main branch. In an exemplary embodiment, the capacitors are MOS capacitors.
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15 Claims
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1. An apparatus comprising:
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a main branch comprising a first signal path having a first capacitor pair connected in series with first reversed polarities and a second signal path having a second capacitor pair connected in series with second reversed polarities, the first and second signal paths connected in parallel, wherein the first capacitor pair is configured to receive a first bias voltage, and wherein the second capacitor pair is configured to receive a second bias voltage that is different than the first bias voltage; and an auxiliary branch comprising at least one signal path having at least one capacitor pair connected in series with third reversed polarities and connected in parallel with the main branch, wherein the first capacitor pair, the second capacitor pair, and the at least one capacitor pair are configured to improve linearity of an analog filter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification