Integrated standard-compliant data acquisition device
First Claim
1. An integrated standard-compliant data acquisition device comprising:
- an electrically insulating package including a plurality of conductive leads; and
an integrated circuit (IC) disposed within the electrically insulating package and electrically coupled to at least some of the plurality of conductive leads, the IC including;
(a) a first multiplexer (MUX) having a first plurality of inputs and a first MUX output, wherein the first MUX is a high-voltage (HV) MUX switch bank;
(b) a second MUX having a second plurality of inputs and a second MUX output, wherein the second MUX is an alternative HV MUX switch bank;
(c) a third MUX having inputs coupled to the first MUX output and the second MUX output by an LS amplifier and having a third MUX output, wherein the third MUX is a low-voltage (LV) MUX, and wherein the voltage level of the first MUX is reduced by the LS amplifier;
(d) an analog-to-digital converter (ADC) having an analog input coupled to the third MUX output and a digital output;
(e) a plurality of registers;
(f) a fourth MUX having inputs coupled to the digital output of the ADC and to the plurality of registers, and having a fourth MUX output;
(g) control logic coupled to the fourth MUX output and to the plurality of registers; and
(h) communication circuitry coupled to the plurality of registers.
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Accused Products
Abstract
An integrated standard-compliant data acquisition device includes an electrically insulating package including a plurality of conductive leads and an integrated circuit (IC) disposed within the electrically insulating package and electrically coupled to at least some of the plurality of conductive leads. The IC includes a first multiplexer (MUX), a second MUX, a third MUX, an analog-to-digital converter (ADC), a plurality of registers, a fourth MUX, control logic, and communication circuitry. In operation, a first circuit value under a first condition can be determined and stored, a second circuit value under a second condition can be determined and stored, and the decision as to whether there is a fault condition can be mad by comparing the first circuit value and the second circuit value.
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Citations
12 Claims
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1. An integrated standard-compliant data acquisition device comprising:
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an electrically insulating package including a plurality of conductive leads; and an integrated circuit (IC) disposed within the electrically insulating package and electrically coupled to at least some of the plurality of conductive leads, the IC including; (a) a first multiplexer (MUX) having a first plurality of inputs and a first MUX output, wherein the first MUX is a high-voltage (HV) MUX switch bank; (b) a second MUX having a second plurality of inputs and a second MUX output, wherein the second MUX is an alternative HV MUX switch bank; (c) a third MUX having inputs coupled to the first MUX output and the second MUX output by an LS amplifier and having a third MUX output, wherein the third MUX is a low-voltage (LV) MUX, and wherein the voltage level of the first MUX is reduced by the LS amplifier; (d) an analog-to-digital converter (ADC) having an analog input coupled to the third MUX output and a digital output; (e) a plurality of registers; (f) a fourth MUX having inputs coupled to the digital output of the ADC and to the plurality of registers, and having a fourth MUX output; (g) control logic coupled to the fourth MUX output and to the plurality of registers; and (h) communication circuitry coupled to the plurality of registers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An ISO-26262 compliant battery monitoring system comprising:
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a first multiplexer (MUX) having a first plurality of inputs coupled to a plurality of battery cells with a plurality of filter resistors, and a first MUX output, wherein the first MUX is a high-voltage (HV) MUX; a second MUX having a second plurality of inputs coupled to the plurality of battery cells with a plurality of balance resistors, and a second MUX output, wherein the second MUX is an alternative HV MUX; a plurality of balancing switches coupled between adjacent pairs of the plurality of balance resistors; a third MUX having inputs coupled to the first MUX output and the second MUX output by an LS amplifier and having a third MUX output, wherein the third MUX is a low-voltage (LV) MUX, and wherein the voltage level of the first MUX is reduced by the LS amplifier; an analog-to-digital converter (ADC) having an analog input coupled to the third MUX output and a digital output; and a data register coupled to the ADC. - View Dependent Claims (11, 12)
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Specification