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Real-time multi-functional ECG signal processing system, DSPE for the ECG signal processing system, and method thereof

  • US 9,717,430 B2
  • Filed: 06/12/2014
  • Issued: 08/01/2017
  • Est. Priority Date: 06/12/2013
  • Status: Active Grant
First Claim
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1. An electrocardiogram (ECG) signal processing system, the ECG signal processing system comprising:

  • an analog-to-digital converter (ADC) operable for sampling an input analog ECG signal at a first frequency f1 and a second frequency f2 to convert the input analog ECG signal into a digital ECG signal;

    a digital signal processing engine (DSPE) coupled to the ADC to receive the digital ECG signal, the DSPE being configured to sample the digital ECG signal at the first frequency f1 and the second frequency f2 to decompose and reconstruct the digital ECG signal; and

    a dynamic system clock source coupled to the ADC and the DSPE for dynamic adaptive signal sampling, the dynamic system clock source clocking the ADC and the DSPE at the first frequency f1 to detect one or more first parameters of the input analog ECG signal and at the second frequency f2 to detect one or more second parameters of the input analog ECG signal, wherein the DSPE comprises;

    a wavelet transformation (WT) unit, the WT unit comprising a plurality of scales, wherein the WT unit is adapted to decompose the digital ECG signal into a plurality of wavelets, each wavelet being output from one of the plurality of scales; and

    a plurality of signal processing blocks, each of the signal processing blocks coupled to one or more outputs of the plurality of scales and configured to receive and process the one or more wavelets from the respective outputs, wherein the signal processing blocks provide processing functions which differ from one another, wherein the plurality of signal processing blocks comprise a cardiac features extraction block, the cardiac features extraction block receiving a high pass filtering of a predetermined one of the plurality of scales, wherein the cardiac features extraction block is configured to process a QRS complex extraction when the dynamic system clock source is clocking the ADC and the DSPE at the first frequency f1, and to process P wave extraction and T wave extraction when the dynamic system clock source is clocking the ADC and the DSPE at the second frequency f2.

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