Pixel circuits for AMOLED displays

• US 9,721,505 B2
• Filed: 06/16/2016
• Issued: 08/01/2017
• Est. Priority Date: 03/08/2013
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, Gholamreza, Azizi, Yaser
• Primary Examiner(s): Lee, Jr., Kenneth B
• Application Number:
  US15/184,233
• Publication Number:
  US 20160293104A1
• Time in Patent Office: 411 Days
• Field of Search: None
• CPC Class Codes: G06F 1/3218 of display devices
• CPC Class Codes: G06F 1/3265 Power saving in display device
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2320/048 using evaluation of the usage time
• CPC Class Codes: G09G 2320/0613 The adjustment depending on the type of the information to be displayed
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 2320/0693 Calibration of display systems
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system for driving a display that includes a plurality of pixel circuits arranged in an array, each of the pixel circuits including a light emitting device and a driving transistor for conveying a driving current through the light emitting device. Methods of measuring characteristics of circuit elements of pixels sharing a monitor line include the control of biasing to selectively turn off circuit elements or render their response known while measuring other circuit elements of interest.

Claims

1. A method of determining characteristics of at least one circuit element of at least one selected pixel sharing a monitor line, said selected pixels in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising:

controlling a biasing of a first number of selected pixels of the at least one selected pixel, each selected pixel including a second number of circuit elements of the at least one circuit element, the biasing including a biasing over a monitor line coupled to the first number of selected pixels, the controlling the biasing of the first number of selected pixels having a total number of degrees of freedom of biasing greater than or equal to the product of the first number multiplied by the second number; and

measuring with use of said monitor line at least one characteristic of the second number of circuit elements of the first number of selected pixels, while controlling a biasing of a first number of selected pixels, taking at least a number of measurements equal to the product of the first number multiplied by the second number.

4. The method of claim 1, wherein the at least one characteristic of each circuit element comprises at least one of a voltage, a current, and a charge of the circuit element.

5. The method of claim 1, wherein the least one circuit elements of each at least one selected pixel comprise the drive transistor and the optoelectronic device of each at least one selected pixel.

6. The method of claim 5, wherein the at least one selected pixel comprises two pixels sharing the monitor line.

7. The method of claim 6, wherein controlling the biasing of the first number of selected pixels further comprises, controlling VDD supplied to the selected pixels, controlling gate voltages of the drive transistors of the selected pixels, and controlling signals applied to the gates of source switches coupling the monitor line with the selected pixels.

8. The method of claim 1, wherein the optoelectronic device is an OLED.

2. A method of determining the characteristics of circuit elements of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising:

controlling a biasing of a selected pixel of the at least one selected pixel, said biasing including adjusting a biasing of a gate of a selected drive transistor of the selected pixel until a specific current passes through a selected source switch coupling the selected pixel to a monitor line;

controlling a biasing of a first pixel coupled to the monitor line via source and drain terminals of a first source switch such that the first source switch is biased with at least one of a zero voltage and a fixed known voltage across the source and the drain terminal of the first source switch resulting in a corresponding one of a zero current and a fixed known current passing through the first source switch, the monitor line shared with the selected pixel; and

measuring at least one characteristic of at least one circuit element of said selected pixel with use of said monitor line.

3. The method of claim 2 wherein the controlling of the biasing of the selected pixel comprises adjusting a voltage applied to the gate of the selected drive transistor until a predetermined current through the selected source switch of the selected pixel is measured over the monitor line, the method further comprising determining a change in characteristics of a selected optoelectronic device of the at least one selected pixel with use of a value of the voltage applied to the gate of the selected drive transistor.

9. The method of claim 2, further comprising, prior to controlling the biasing of the selected pixel of the at least one selected pixel and prior to controlling the biasing of the first pixel, determining the fixed known current passing through the first source switch resulting from the corresponding fixed known voltage across the source and drain terminals of the first source switch.

10. The method of claim 9, wherein said determining comprises measuring over the monitor line the known current passing through said first source switch in response to applying the fixed known voltage across the source and drain terminals of the first source switch, while the optoelectronic device of the first pixel is off.

11. The method of claim 10, wherein said determining further comprises performing said measuring while the selected drive transistor and the optoelectronic device of the selected pixel are off.

12. The method of claim 11, wherein said determining further comprises, prior to said measuring, turning on the drive transistor of the first pixel to bias a node between the drive transistor of the first pixel and the first source switch to a second fixed known voltage.

13. The method of claim 12, wherein said second fixed known voltage is VDD.

14. The method of claim 13, wherein said determining further comprises, prior to said measuring, setting a bias voltage on said monitor line which has a voltage difference from VDD equal to said known fixed voltage across the source and drain terminals of the first source switch.

15. The method of claim 2, wherein the optoelectronic device is an OLED.