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Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control

  • US 9,721,790 B2
  • Filed: 06/01/2016
  • Issued: 08/01/2017
  • Est. Priority Date: 06/02/2015
  • Status: Active Grant
First Claim
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1. A method for processing a semiconductor wafer in a single wafer processing chamber, the method comprising:

  • heating the single wafer processing chamber to a temperature in a range of 650-700°

    C.; and

    forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;

    wherein depositing the oxygen comprises depositing the oxygen using an N2O gas flow, wherein the N2O gas flow comprises 0.1% to 10% N2O in a gas comprising He.

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