Clock synchronization in an RFID equipped device

• US 9,727,767 B2
• Filed: 03/12/2013
• Issued: 08/08/2017
• Est. Priority Date: 03/12/2013
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Breitfuss, Klemens, Thueringer, Peter
• Primary Examiner(s): Jiang, Yong Hang
• Application Number:
  US13/795,483
• Publication Number:
  US 20140266611A1
• Time in Patent Office: 1,610 Days
• CPC Class Codes: G06K 19/0727 the arrangement being a circuit facilitating integration of the record carrier with a hand-held device such as a smart phone of PDA
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 7/10386 the interrogation device being of the portable or hand-handheld type, e.g. incorporated in ubiquitous hand-held devices such as PDA or mobile phone, or in the form of a portable dedicated RFID reader
• CPC Class Codes: H04B 5/26 using coils
• CPC Class Codes: H04B 5/77 for interrogation
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation
• CPC Class Codes: H04L 7/0012 by comparing receiver clock with transmitter clock
• CPC Class Codes: H04L 7/0331 with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock H04L7/0337 takes precedence

Abstract

Embodiments of a method for clock synchronization in a radio frequency identification (RFID) equipped device, an RFID equipped device, and a hand-held communications device are described. In one embodiment, a method for clock synchronization in an RFID equipped device involves measuring a difference between a field clock frequency generated from an external clock and an internal clock frequency generated from an internal clock and generating outgoing bits in the RFID equipped device in response to the measured difference. Generating the outgoing bits involves adjusting the bit length of at least one of the outgoing bits in response to the measured difference. Other embodiments are also described.

Claims

1. A method for clock synchronization in a radio frequency identification (RFID) equipped device, the method comprising:

measuring a difference between a field clock frequency generated from an external clock and an internal clock frequency generated from an internal clock; and

generating outgoing bits in the RFID equipped device in response to the measured difference, wherein generating the outgoing bits comprises adjusting the bit length of at least one of the outgoing bits in response to the measured difference while keeping an average bit length error of the outgoing bits below a predefined percentage threshold, wherein adjusting the bit length of at least one of the outgoing bits comprises adding a clock period to a non-shifting signal section of at least one of the outgoing bits or removing a clock period from a non-shifting signal section of at least one of the outgoing bits.

2. The method of claim 1, wherein adjusting the bit length of at least one of the outgoing bits comprises:

adding the clock period to the non-shifting signal section of at least one of the outgoing bits if the external field clock frequency is lower than the internal clock frequency; and

removing the clock period from the non-shifting signal section of at least one of the outgoing bits if the external field clock frequency is higher than the internal clock frequency.

3. The method of claim 1, further comprising:

modulating the outgoing bits into modulated signals using active modulation, wherein modulating the outgoing bits comprises generating an electromagnetic field; and

transmitting the modulated signals through the electromagnetic field.

4. The method of claim 1, wherein the RFID equipped device comprises a contactless smart card.

5. The method of claim 1, further comprising:

receiving wireless signals through an antenna of the RFID equipped device; and

deriving the external field clock frequency from the received wireless signals.

6. The method of claim 1, wherein the RFID equipped device comprises a Near Field Communication (NFC) module, and wherein the method further comprises:

receiving NFC wireless signals through an antenna of the NFC module; and

deriving the external field clock frequency from the received NFC wireless signals.

7. The method of claim 1, wherein the RFID equipped device comprises a crystal oscillator configured to provide an internal clock signal that has the internal clock frequency.

8. The method of claim 1, wherein the RFID equipped device is a mobile hand-held communications device.

17. The method of claim 1, wherein the predefined percentage threshold is 10% of a single bit length.

18. The method of claim 1, wherein measuring the difference between the field clock frequency generated from the external clock and the internal clock frequency generated from the internal clock comprises measuring the difference between the field clock frequency generated from the external clock and the internal clock frequency generated from the internal clock within a time period between the switching on of the external clock and the signal transmission from the RFID equipped device.

9. A radio frequency identification (RFID) equipped device comprising:

a clock difference measurement unit configured to measure a difference between a field clock frequency generated from an external clock and an internal clock frequency generated from an internal clock; and

a modulator configured to generate outgoing bits in response to the measured difference, wherein the modulator comprises a bit length adjustment unit configured to adjust the bit length of at least one of the outgoing bits in response to the measured difference while keeping an average bit length error of the outgoing bits below a predefined percentage threshold, wherein the bit length adjustment unit is configured to add a clock period to a non-shifting signal section of at least one of the outgoing bits or to remove a clock period from a non-shifting signal section of at least one of the outgoing bits.

10. The RFID equipped device of claim 9, wherein the bit length adjustment unit is further configured to:

add the clock period to the non-shifting signal section of at least one of the outgoing bits if the external field clock frequency is lower than the internal clock frequency; and

remove the clock period from the non-shifting signal section of at least one of the outgoing bits if the external field clock frequency is higher than the internal clock frequency.

11. The RFID equipped device of claim 9, wherein the RFID equipped device comprises a contactless smart card.

12. The RFID equipped device of claim 9, further comprising an antenna configured to receive wireless signals, wherein the clock difference measurement unit is further configured to derive the external field clock frequency from the received wireless signals.

13. The RFID equipped device of claim 9, wherein the RFID equipped device comprises a Near Field Communication (NFC) module, wherein the NFC module comprises an antenna configured to receive NFC wireless signals, and wherein the clock difference measurement unit is further configured to derive the external field clock frequency from the received NFC wireless signals.

14. The RFID equipped device of claim 9, further comprising a crystal oscillator configured to provide an internal clock signal that has the internal clock frequency.

15. A hand-held communications device comprises the RFID equipped device of claim 9.

16. A hand-held communications device comprising:

a crystal oscillator configured to provide an internal clock signal; and

a Near Field Communication (NFC) module comprising;

an antenna configured to receive NFC wireless signals;

a clock difference measurement unit configured to derive an external field clock frequency from the received NFC wireless signals and to measure a difference between the external field clock frequency and an internal clock frequency of the internal clock signal; and

a modulator configured to generate outgoing bits in response to the measured difference, wherein the modulator comprises a bit length adjustment unit configured to add a clock period to a non-shifting signal section of one of the outgoing bits or to remove a clock period from a non-shifting signal section of one of the outgoing bits in response to the measured difference while keeping an average bit length error of the outgoing bits below a predefined percentage threshold.