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Resistive memory device

  • US 9,728,721 B2
  • Filed: 07/25/2014
  • Issued: 08/08/2017
  • Est. Priority Date: 07/25/2014
  • Status: Active Grant
First Claim
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1. A method for forming a device comprising:

  • providing a substrate prepared with a lower cell dielectric layer with gate conductors disposed in a first direction, wherein the gate conductors are elongated gate conductors formed in the lower cell dielectric layer and separated by the lower cell dielectric layer;

    forming a body unit conductor over a top surface of the lower cell dielectric layer and gate conductors, wherein the body unit conductor is disposed in and along a second direction orthogonal to the first direction and traverses the gate conductors;

    forming memory element conductors on the body unit conductor and lower cell dielectric layer, wherein the memory element conductors are elongated memory element conductors disposed in and along the same first direction over the gate conductors; and

    forming an upper cell dielectric layer on the substrate to cover the lower cell dielectric layer, body unit conductor and memory element conductors, wherein the upper cell dielectric layer isolates the memory element conductors from each other.

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