Systems and methods for controlling aliasing in images captured by an array camera for use in super-resolution processing

• US 9,733,486 B2
• Filed: 07/30/2015
• Issued: 08/15/2017
• Est. Priority Date: 03/13/2013
• Status: Active Grant

• Current Assignee: FotoNation Limited (Adeia Inc.)
• Original Assignee: Fotonation Cayman Limited
• Inventors: Lelescu, Dan, Venkataraman, Kartik
• Primary Examiner(s): Daniels, Anthony J
• Application Number:
  US14/814,297
• Publication Number:
  US 20160195733A1
• Time in Patent Office: 747 Days
• Field of Search: 348374
• CPC Class Codes: G02B 27/58 Optics for apodization or superresolution; Optical synthetic aperture systems
• CPC Class Codes: G02B 3/0056 arranged along two different directions in a plane, e.g. honeycomb arrangement of lenses G02B3/0043 takes precedence; miniaturised objectives for electronic devices employing wafer level optics G02B13/0085
• CPC Class Codes: G02B 5/003 Light absorbing elements
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H04N 23/00 Cameras or camera modules comprising electronic image sensors; Control thereof
• CPC Class Codes: H04N 23/45 for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

Imager arrays, array camera modules, and array cameras in accordance with embodiments of the invention utilize pixel apertures to control the amount of aliasing present in captured images of a scene. One embodiment includes a plurality of focal planes, control circuitry configured to control the capture of image information by the pixels within the focal planes, and sampling circuitry configured to convert pixel outputs into digital pixel data. In addition, the pixels in the plurality of focal planes include a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information, and the pixel stack defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area.

Claims

1. An imager array, comprising:

a plurality of focal planes, where each of the plurality of focal planes comprises a two dimensional arrangement of pixels having at least two pixels in each dimension having a pixel pitch and each of the plurality of focal planes is contained within a region of the imager array that does not contain pixels from another one of the plurality of focal planes;

control circuitry configured to control the capture of image information by the at least two pixels in each dimension within each of the plurality of focal planes; and

sampling circuitry configured to convert pixel outputs into digital pixel data;

wherein the pixels in the plurality of focal planes comprise a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information;

wherein the pixel stack of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area and pixel stacks of each of the at least two pixels in each dimension of each of the plurality of focal planes are arranged to have a ratio of active area to pixel pitch that causes at least a certain amount of desired aliasing in the image information captured by the sampling circuitry.

2. The imager array of claim 1, wherein the pixel aperture of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes is formed by a microlens that is smaller than the pixel area.

3. The imager array of claim 2, wherein gaps exist between adjacent microlenses in the pixel stacks of adjacent pixels in the at least two pixels in each dimension of each of the plurality of focal planes.

4. The imager array of claim 3, wherein light is prevented from entering the pixel stacks through the gaps between the adjacent microlenses by a light blocking material.

5. The imager array of claim 4, wherein photoresist is located in the gaps between the adjacent microlenses.

6. The imager array of claim 2, wherein the amount of aliasing in the image information captured by one of the plurality of focal planes is greater than the amount of aliasing that would be present were the microlens to occupy the entire pixel area defined by the pixel stack.

7. The imager array of claim 2, wherein the pixel stack of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes further comprises an oxide layer and the microlens sits atop the oxide layer.

8. The imager array of claim 7, wherein the pixel stack of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes includes a color filter.

9. The imager array of claim 8, wherein the color filter in the pixel stack of each pixel in the at least two pixels in each dimension of a one of the plurality of focal planes is the same.

10. The imager array of claim 8, wherein the color filters in the pixel stacks of the pixels in the at least two pixels in each dimension of a one of the plurality of focal planes form a Bayer filter pattern.

11. The imager array of claim 7, wherein the pixel stack of each pixel in the at least two pixels in each dimension of a one of the plurality of focal planes does not include a color filter.

12. The imager array of claim 7, wherein the pixel stack of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes includes a nitride passivation layer and a bottom oxide layer that provides support and isolation for metal interconnects.

13. The imager array of claim 1, wherein the pixel aperture of each pixel in the at least two pixels in each dimension of each of the plurality of focal planes is formed using at least one light blocking material.

14. An array camera module, comprising:

an imager array configured to capture light field image data, comprising;

a plurality of focal planes, where each of the plurality of focal planes comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each of the plurality of focal planes is contained within a region of the imager array that does not contain pixels from another one of the plurality of focal planes;

control circuitry configured to control the capture of image information from the at least two pixels in each dimension of the two dimensional arrangement of pixels within each of the plurality of focal planes; and

sampling circuitry configured to convert pixel outputs from the at least two pixels in each dimension of the two dimensional arrangement of pixels within each of the plurality of focal planes into digital pixel data;

wherein each pixel from the at least two pixels in each dimension of the two dimensional arrangement of pixels within each of the plurality of focal planes comprise a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information;

wherein the pixel stack in each pixel defines a pixel area and includes a pixel aperture, where the size of the pixel aperture is smaller than the pixel area;

an optic array of lens stacks, where each of the lens stacks in the optical array form an image including aliasing on a particular one of the plurality of focal planes; and

wherein pixel stacks of each of the at least two pixels in each dimension of each of the plurality of focal planes are arranged to have a ratio of active area to pixel pitch that causes at least a certain amount of desired aliasing in the image information captured by the sampling circuitry.

15. The array camera module of claim 14, wherein the pixel aperture is formed by a microlens that is smaller than the pixel area.

16. The array camera module of claim 15, wherein gaps exist between adjacent microlenses in the pixel stacks of adjacent pixels in a particular one of the plurality of focal planes.

17. The array camera module of claim 16, wherein light is prevented from entering the pixel stacks of the at least two pixels in each dimension of the two dimensional arrangement of pixels within each of the plurality of focal planes through the gaps between the microlenses by a light blocking material.

18. The array camera module of claim 17, wherein photoresist is located in the gaps between the microlenses.

19. The array camera module of claim 15, wherein the amount of aliasing in images captured by a one of the plurality of focal planes is greater than the amount of aliasing that would be present were the microlens of the at least two pixels in each dimension of the two dimensional arrangement of pixels within each of the plurality of focal planes to occupy the entire pixel area defined by the pixel stack.