Semiconductor carrier with vertical power FET module
First Claim
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1. A circuit module having a semiconductor power switch, comprising:
- a planar first electrode;
a first layer of doped semiconductor material disposed on the planar first electrode that forms ohmic contact with the planar first electrode;
a second layer of doped semiconductor material disposed on the first layer that is electronically patterned to form a field effect transistor (FET);
a second electrode disposed upon the second layer;
an elongated gate electrode located to modulate current flow from the planar first electrode through the second layer to the second electrode and having a ratio of gate electrode width to gate electrode length that is greater than or equal to 100;
wherein the elongated gate electrode forms a serpentine pattern over the second layer and is insulated from the second layer and the second electrode; and
wherein the elongated gate electrode comprises a conductor that forms a resonant transmission line by configuring the conductor to form the serpentine patterned elongated gate electrode that contains a capacitive element determined by charge collected beneath the elongated gate electrode, a resistive element determined by the conductor length and cross-sectional area of the conductor used to form the serpentine patterned elongated gate , and an inductive element formed by half-turns that loop the serpentine pattern back upon itself, which resonant transmission line is resonant at a frequency determined by internal capacitance and inductance.
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Abstract
A monolithic power switch provides a semiconductor layer, a three dimensional FET formed in the semiconductor layer to modulate currents through the semiconductor layer, and a toroidal inductor with a ceramic magnetic core formed on the semiconductor layer around the FET and having a first winding connected to the FET.
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Citations
7 Claims
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1. A circuit module having a semiconductor power switch, comprising:
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a planar first electrode; a first layer of doped semiconductor material disposed on the planar first electrode that forms ohmic contact with the planar first electrode;
a second layer of doped semiconductor material disposed on the first layer that is electronically patterned to form a field effect transistor (FET);a second electrode disposed upon the second layer; an elongated gate electrode located to modulate current flow from the planar first electrode through the second layer to the second electrode and having a ratio of gate electrode width to gate electrode length that is greater than or equal to 100; wherein the elongated gate electrode forms a serpentine pattern over the second layer and is insulated from the second layer and the second electrode; and wherein the elongated gate electrode comprises a conductor that forms a resonant transmission line by configuring the conductor to form the serpentine patterned elongated gate electrode that contains a capacitive element determined by charge collected beneath the elongated gate electrode, a resistive element determined by the conductor length and cross-sectional area of the conductor used to form the serpentine patterned elongated gate , and an inductive element formed by half-turns that loop the serpentine pattern back upon itself, which resonant transmission line is resonant at a frequency determined by internal capacitance and inductance. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification