Apparatus and methods for on-die temperature sensing to improve FPGA performance

• US 9,735,779 B1
• Filed: 07/31/2009
• Issued: 08/15/2017
• Est. Priority Date: 07/07/2009
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Perisetty, Srinivas
• Primary Examiner(s): Owens, Douglas W
• Assistant Examiner(s): Cho, James H
• Application Number:
  US12/534,105
• Time in Patent Office: 2,937 Days
• Field of Search: 326 31- 33, 326 37- 41, 326 47
• CPC Class Codes: H01L 23/34 Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements thermal treatment apparatus H01L21/00
• CPC Class Codes: H01L 28/00 Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor testing or measuring during manufacture H01L22/00; integration methods H01L21/70; integrated circuits H01L27/00; two-terminal components with a potential-jump or surface barrier H01L29/00; resistors in general H01C; inductors in general H01F; capacitors in general H01G
• CPC Class Codes: H03K 19/00369 Modifications for compensating variations of temperature, supply voltage or other physical parameters

Abstract

A field programmable gate array (FPGA) includes a temperature sensor array. The FPGA also includes a supply voltage modulation circuit. The supply voltage modulation circuit is coupled to the temperature sensor array.

Claims

1. A field programmable gate array (FPGA), comprising:

a temperature sensor array adapted to provide an output signal; and

a supply voltage modulation circuit coupled to receive a reference signal derived from the output signal of the temperature sensor array.

2. The field programmable gate array (FPGA) according to claim 1, wherein the temperature sensor array comprises a plurality of diodes.

3. The field programmable gate array (FPGA) according to claim 2, wherein the plurality of diodes are distributed uniformly within core circuitry of the field programmable gate array (FPGA).

4. The field programmable gate array (FPGA) according to claim 2, wherein the plurality of diodes are distributed non-uniformly within core circuitry of the field programmable gate array (FPGA).

5. The field programmable gate array (FPGA) according to claim 1, wherein the supply voltage modulation circuit is operable to modulate a supply voltage of the field programmable gate array (FPGA).

6. The field programmable gate array (FPGA) according to claim 1, wherein the supply voltage modulation circuit is operable to modulate a supply voltage of programmable logic circuitry within the field programmable gate array (FPGA).

7. The field programmable gate array (FPGA) according to claim 1, wherein the supply voltage modulation circuit is operable to modulate a supply voltage of programmable interconnect circuitry within the field programmable gate array (FPGA).

8. The field programmable gate array (FPGA) according to claim 1, further comprising body bias modulation circuit coupled to the temperature sensor array.

9. A field programmable gate array (FPGA), comprising:

a temperature sensor array adapted to provide an output signal; and

a body bias modulation circuit coupled to receive a reference signal derived from the output signal of the temperature sensor array.

10. The field programmable gate array (FPGA) according to claim 9, wherein the temperature sensor array comprises a plurality of diodes.

11. The field programmable gate array (FPGA) according to claim 10, wherein the plurality of diodes are distributed uniformly within core circuitry of the field programmable gate array (FPGA).

12. The field programmable gate array (FPGA) according to claim 10, wherein the plurality of diodes are distributed non-uniformly within core circuitry of the field programmable gate array (FPGA).

13. The field programmable gate array (FPGA) according to claim 9 wherein the body bias modulation circuit is operable to modulate a body bias of at least one transistor in the field programmable gate array (FPGA).

14. The field programmable gate array (FPGA) according to claim 9, further comprising programmable logic circuitry, wherein the body bias modulation circuit is operable to modulate a body bias of at least one transistor in the programmable logic circuitry.

15. The field programmable gate array (FPGA) according to claim 9, further comprising programmable interconnect circuitry, wherein the body bias modulation circuit is operable to modulate a body bias of at least one transistor in the programmable interconnect circuitry.

16. A method of operating a field programmable gate array (FPGA), the method comprising:

using a temperature sensor array to obtain a plurality of temperature values for a die of the field programmable gate array (FPGA) to generate a reference signal derived from the plurality of temperature values; and

modulating, based on the reference signal derived from the plurality of temperature values, at least one of a supply voltage of the field programmable gate array (FPGA) and a body bias of the field programmable gate array (FPGA).

17. The method according to claim 16, wherein modulating, based on the plurality of temperature values, at least one of a supply voltage of the field programmable gate array (FPGA) and a body bias of the field programmable gate array (FPGA) further comprises modulating a supply voltage of programmable logic circuitry within the field programmable gate array (FPGA).

18. The method according to claim 16, wherein modulating, based on the plurality of temperature values, at least one of a supply voltage of the field programmable gate array (FPGA) and a body bias of the field programmable gate array (FPGA) further comprises modulating a supply voltage of programmable interconnect circuitry within the field programmable gate array (FPGA).

19. The method according to claim 16, wherein modulating, based on the plurality of temperature values, at least one of a supply voltage of the field programmable gate array (FPGA) and a body bias of the field programmable gate array (FPGA) further comprises modulating a body bias applied to programmable logic circuitry within the field programmable gate array (FPGA).

20. The method according to claim 16, wherein modulating, based on the plurality of temperature values, at least one of a supply voltage of the field programmable gate array (FPGA) and a body bias of the field programmable gate array (FPGA) further comprises modulating a body bias applied to programmable interconnect circuitry within the field programmable gate array (FPGA).