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Optimization of integrated circuit reliability

  • US 9,739,824 B2
  • Filed: 05/16/2016
  • Issued: 08/22/2017
  • Est. Priority Date: 10/28/2013
  • Status: Active Grant
First Claim
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1. A method for optimizing reliability of integrated circuits, the method comprising:

  • a computer integrating a per-chip equivalent oxide thickness (EOT) circuit sensor into an integrated circuit,the computer utilizing the per-chip EOT circuit sensor to determine electrical characteristics of the integrated circuit;

    the computer determining physical attributes of the integrated circuit as a function of the determined electrical characteristics;

    the computer modeling a predicted integrated circuit failure rate using the determined physical attributes of the integrated circuit;

    the computer defines circuits, tests and pass/fail criteria required to meet qualification objectives of a technology and/or product, wherein the qualification objectives includes a plan comprising a list of required hardware along with defined tests that the hardware is to be subjected, and pass/fail criteria; and

    the computer accessing EOT sensor circuit data stored in a database and using the EOT sensor circuit data to calculate an oxide thickness value for subsequent reliability modeling of the integrated circuit.

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