Display systems with compensation for line propagation delay

• US 9,741,279 B2
• Filed: 11/28/2016
• Issued: 08/22/2017
• Est. Priority Date: 05/23/2012
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, Gholamreza, Azizi, Yaser
• Primary Examiner(s): Edun, Muhammad N
• Application Number:
  US15/362,541
• Publication Number:
  US 20170076647A1
• Time in Patent Office: 267 Days
• CPC Class Codes: G09G 1/002 Intensity circuits G09G1/06 - G09G1/28 take precedence
• CPC Class Codes: G09G 1/12 the deflection signals being produced by essentially analogue means
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2320/0693 Calibration of display systems
• CPC Class Codes: G09G 2330/10 Dealing with defective pixels
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/18 using liquid crystals
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.

Claims

1. A method of measuring a signal offset of signals on a signal line of a display system having a pixel circuit, the method comprising:

generating a first signal from a first location on the signal line;

measuring the first signal at a second location on the signal line upon expiry a first time duration sufficient to avoid settling effects, generating a first signal measurement;

generating a second signal from the first location;

measuring the second signal at the second location upon expiry of a second time duration insufficient to avoid settling effects, generating a second signal measurement; and

comparing the first signal measurement with the second signal measurement to extract the signal offset.

2. The method of claim 1, wherein the signal offset is a voltage signal offset, the signals are voltage signals, and the first and second signals are voltage signals.

3. The method of claim 1, wherein the signal offset is a current signal offset, the signals are current signals, and the first and second signals are current signals.

4. The method of claim 1, wherein the signal line is a data line connected to the pixel circuit at the second location, the signal offset is a programming signal offset, the signals are programming signals transmitted to the pixel circuit, and the first and second signals are programming signals.

5. The method of claim 4, further comprising, prior to comparing the first signal measurement with the second signal measurement:

extracting the first signal measurement from the second location over a monitor line after the expiry of the first time duration and after sufficient monitoring time to avoid settling effects on the monitor line; and

extracting the second signal measurement from the second location over the monitor line after the expiry of the second time duration and after sufficient monitoring time to avoid settling effects on the monitor line,

wherein measuring the first signal at the second location comprises storing a measured level of the first signal at the pixel circuit upon expiry of the first time duration and measuring the second signal at the second location comprises storing a measured level of the second signal at the pixel circuit upon expiry of the second time duration.

6. The method of claim 1, wherein the signal line is a monitor line connected to the pixel circuit at the first location, the signal offset is a monitored signal offset, the signals are monitored signals received from the pixel circuit, and the first and second signals are monitored signals.

7. The method of claim 1, wherein the extracting of the signal offset is carried out during an initial factory calibration and wherein the signal offset is used in subsequent operation of the display system.

8. The method of claim 1, further comprising calibrating at least one of programming of the pixel circuit and monitoring of the pixel circuit with use of the extracted signal offset.

9. The method of claim 1, wherein at least one of the first time duration and the second time duration vary as a function of a physical distance between the first location and the second location.

10. A display comprising:

a pixel circuit;

a driver for programming the pixel circuit;

a monitor for monitoring the pixel circuit;

a signal line connecting the pixel circuit with at least one of the driver and the monitor; and

a controller configured to control the pixel circuit, and the at least one of the driver and the monitor to;

generate a first signal from a first location on the signal line;

measure the first signal at a second location on the signal line upon expiry a first time duration sufficient to avoid settling effects, generating a first signal measurement;

generate a second signal from the first location; and

measure the second signal at the second location upon expiry of a second time duration insufficient to avoid settling effects, generating a second signal measurement,

the controller configured to compare the first signal measurement with the second signal measurement to extract a signal offset of signals on the signal line.

11. The display of claim 10, wherein the signal offset is a voltage signal offset, the signals are voltage signals, and the first and second signals are voltage signals.

12. The display of claim 10, wherein the signal offset is a current signal offset, the signals are current signals, and the first and second signals are current signals.

13. The display of claim 10, wherein the signal line is a data line connected to the pixel circuit at the second location and connected to the driver at the first location, the signal offset is a programming signal offset, the signals are programming signals transmitted to the pixel circuit, and the first and second signals are programming signals.

14. The display of claim 13, wherein the controller is further configured to control the monitor to, prior to the controller'"'"'s comparing the first signal measurement with the second signal measurement:

extract the first signal measurement from the second location over a monitor line after the expiry of the first time duration and after sufficient monitoring time to avoid settling effects on the monitor line; and

extract the second signal measurement from the second location over the monitor line after the expiry of the second time duration and after sufficient monitoring time to avoid settling effects on the monitor line,

and wherein the controller is further configured to control the pixel circuit to;

perform said measuring of the first signal at the second location by storing a measured level of the first signal at the pixel circuit upon expiry of the first time duration; and

perform said measuring of the second signal at the second location by storing a measured level of the second signal at the pixel circuit upon expiry of the second time duration.

15. The display of claim 10, wherein the signal line is a monitor line connected to the pixel circuit at the first location an connected to the monitor at the second location, the signal offset is a monitored signal offset, the signals are monitored signals received from the pixel circuit, and the first and second signals are monitored signals.

16. The display of claim 10, wherein the controller is configured to extract the signal offset during an initial factory calibration and is configured to use the signal offset in subsequent operation of the display system.

17. The display of claim 10, wherein the controller is further configured to calibrate at least one of programming of the pixel circuit and monitoring of the pixel circuit with use of the extracted signal offset.

18. The display of claim 10, wherein at least one of the first time duration and the second time duration vary as a function of a physical distance between the first location and the second location.