Reconfigurable multi-stack inductor

• US 9,741,485 B2
• Filed: 08/11/2015
• Issued: 08/22/2017
• Est. Priority Date: 09/26/2013
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Sun, Pinping, Pei, Chengwen, Xu, Zheng
• Primary Examiner(s): CHAN, TSZFUNG JACKIE
• Application Number:
  US14/823,113
• Publication Number:
  US 20150348919A1
• Time in Patent Office: 742 Days
• Field of Search: 336 84 R, 336 84 C, 336 84 M, 336200, 336232, 296021
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 2017/008 Electric or magnetic shielding of printed inductances
• CPC Class Codes: H01F 2027/2809 on stacked layers
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 27/2871 Pancake coils
• CPC Class Codes: H01F 27/289 with auxiliary windings for pancake coils H01F27/2871
• CPC Class Codes: H01F 27/36 Electric or magnetic shields or screens movable for varying inductance H01F21/10
• CPC Class Codes: H01F 27/363 made of electrically conductive material
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor

Abstract

A reconfigurable multi-stack inductor formed within a semiconductor structure may include a first inductor structure located within a first metal layer of the semiconductor structure, a first ground shielding structure located within the first metal layer that is electrically isolated from and circumferentially bounds the first inductor structure, and a second inductor structure located within a second metal layer of the semiconductor structure, whereby the second inductor structure is electrically coupled to the first inductor structure. A second ground shielding structure located within the second metal layer is electrically isolated from and circumferentially bounds the second inductor structure, whereby the first and second inductor generate a first inductance value based on the first ground shielding structure and second ground shielding structure being coupled to ground, and the first and second inductor generate a second inductance value based on the first ground shielding structure and second ground shielding structure electrically floating.

Claims

1. A method of forming a reconfigurable multi-stack inductor structure within a semiconductor structure having a first and a second metal layer, the method comprising:

forming, within the first metal layer, a first inductor structure;

forming, within the first metal layer, a first ground shielding structure that is electrically isolated from and circumferentially bounds the first inductor structure;

forming, within the second metal layer, a second inductor structure;

electrically coupling the first inductor structure and second inductor structure;

forming, within the second metal layer, a second ground shielding structure that is electrically isolated from and circumferentially bounds the second inductor structure;

electrically grounding the first and the second ground shielding structure to generate a first inductance value;

electrically floating the first and the second ground shielding structure to generate a second inductance value; and

forming, within a third metal layer of the semiconductor structure, a ground plane; and

forming a first switch for electrically coupling the first and the second ground shielding structure to the ground plane.

2. The method of claim 1, wherein:

closing the first switch electrically grounds the first and the second ground shielding structure to generate the first inductance value; and

opening the first switch electrically floats the first and the second ground shielding structure to generate the second inductance value.

3. The method of claim 1, further comprising:

forming, within the first metal layer, a third ground shielding structure that is electrically isolated from and circumferentially bounds the first ground shielding structure;

forming, within the second metal layer, a fourth ground shielding structure that is electrically isolated from and circumferentially bounds the second ground shielding structure;

electrically coupling the first and the second ground shielding structure;

electrically coupling the third and the fourth ground shielding structure; and

forming a second switch for coupling the first and the third ground shielding structure.

4. The method of claim 1, wherein:

closing the first switch electrically grounds the first and the second ground shielding structure; and

closing the second switch electrically couples the first, the second, the third, and fourth ground shielding structure, the closing of the first and the second switch generating a third inductance value.

5. The method of claim 1, wherein:

the first inductor structure comprises a first electrically conductive spiral track structure having a first outer track; and

the second inductor structure comprises a second electrically conductive spiral track structure having a second outer track.

6. The structure of claim 5, wherein:

the first ground shielding structure comprises a first spiral electrically conductive track located adjacent the first outer track, the first spiral electrically conductive track and adjacent first outer track electrically isolated by a dielectric material located therebetween; and

the second ground shielding structure comprises a second spiral electrically conductive track located adjacent the second outer track, the second spiral electrically conductive track and adjacent second outer track electrically isolated by a dielectric material located therebetween.