Vertical power transistor device
First Claim
Patent Images
1. A transistor device comprising:
- a substrate;
a drift layer on the substrate;
a spreading layer on the drift layer, the spreading layer comprising a plurality of epitaxial layers between a first surface adjacent to the drift layer and a second surface opposite the first surface, wherein each one of the plurality of epitaxial layers has a different doping concentration such that a doping concentration of the spreading layer varies in a substantially continuous fashion from the first surface to the second surface and a ratio of the doping concentration at the first surface to the doping concentration at the second surface is 1;
x where x is greater than or equal to 2; and
a gate, a drain, and a source;
wherein a channel width of the transistor device is less than 3 microns, an on-state resistance of the transistor device is less than 2.5 mΩ
/cm2, and a blocking voltage of the transistor device is greater than 600 volts.
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Abstract
A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.
111 Citations
20 Claims
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1. A transistor device comprising:
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a substrate; a drift layer on the substrate; a spreading layer on the drift layer, the spreading layer comprising a plurality of epitaxial layers between a first surface adjacent to the drift layer and a second surface opposite the first surface, wherein each one of the plurality of epitaxial layers has a different doping concentration such that a doping concentration of the spreading layer varies in a substantially continuous fashion from the first surface to the second surface and a ratio of the doping concentration at the first surface to the doping concentration at the second surface is 1;
x where x is greater than or equal to 2; anda gate, a drain, and a source; wherein a channel width of the transistor device is less than 3 microns, an on-state resistance of the transistor device is less than 2.5 mΩ
/cm2, and a blocking voltage of the transistor device is greater than 600 volts. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A transistor device comprising:
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a substrate; a drift layer on the substrate; a spreading layer on the drift layer, the spreading layer comprising a plurality of epitaxial layers between a first surface adjacent to the drift layer and a second surface opposite the first surface, wherein each one of the plurality of epitaxial layers has a different doping concentration such that a doping concentration of the spreading layer varies in a substantially continuous fashion from the first surface to the second surface and a ratio of the doping concentration at the first surface to the doping concentration at the second surface is 1;
x where x is greater than or equal to 2; anda gate, a drain, and a source. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification