Voltage converters and methods for use therewith

• US 9,748,781 B2
• Filed: 11/12/2014
• Issued: 08/29/2017
• Est. Priority Date: 06/24/2014
• Status: Expired due to Fees

• Current Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Original Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Inventors: Houston, Michael Jason, Zhao, Lei
• Primary Examiner(s): Amrany, Adi
• Application Number:
  US14/539,699
• Publication Number:
  US 20150372613A1
• Time in Patent Office: 1,021 Days
• Field of Search: 307130
• CPC Class Codes: H02J 2207/20 Charging or discharging characterised by the power electronics converter
• CPC Class Codes: H02J 3/00 Circuit arrangements for ac mains or ac distribution networks
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• CPC Class Codes: H02M 1/0003 Details of control, feedback or regulation circuits
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 7/04 by static converters

Abstract

A voltage error signal V_ERR is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adaptor current limit regulation mode, an adaptor current sense voltage V_ACS, indicative of an adapter current I_A, is compared to an adapter current reference voltage V_{AC_REF} to produce an adapter current error signal V_{AC_ERR}. A compensator receives the adapter current error signal V_{AC_ERR} and outputs a compensated adapter current error signal. The adaptor current sense voltage V_ACS, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal V_ERR provided to the PWM controller. Alternatively, an input voltage V_IN, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal V_ERR.

Claims

1. A voltage regulator, comprising:

an input LC filter that receives an adapter voltage V_A from an adapter and in dependence thereon produces an input voltage V_IN;

a power stage that receives the input voltage V_IN from the input LC filter;

an output LC filter that is coupled to an output of the power stage and outputs an output voltage V_O for use in at least one of powering a load or charging a battery;

a pulse width modulation (PWM) controller that drives the power stage with a PWM signal; and

a regulation mode selector that

(a.1) selects one of a plurality of operational modes for the voltage regulator, one of which is an adaptor current limit regulation mode, and

(a.2) produces a voltage error signal V_ERR that is provided to the PWM controller and used by the PWM controller to produce the PWM signal that drives the power stage;

wherein when the voltage regulator operates in the adaptor current limit regulation mode

(b.1) an adaptor current sense voltage V_ACS, which is indicative of an adapter current I_A, is compared to an adapter current reference voltage V_{AC_REF} to produce an adapter current error signal V_{AC_ERR},

(b.2) a compensator receives the adapter current error signal V_{AC_ERR} and outputs a compensated adapter current error signal, and

(b.3) the adaptor current sense voltage V_ACS, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

2. The voltage regulator of claim 1, wherein a gain factor (K) is applied to produce a high pass filtered version of the adaptor current sense voltage V_ACS that is subtracted from the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

3. The voltage regulator of claim 1, wherein when the voltage regulator operates in the adaptor current limit regulation mode

an inner current feedback loop substantially nulls out both a first complex double pole Z_A caused by the input LC filter and a second complex double pole Z_O caused by the output LC filter;

an outer current feedback loop that regulates the adaptor current I_A feeds back in the first complex double pole Z_A caused by the input LC filter; and

the subtracting out of the adaptor current sense voltage V_ACS, or the high pass filtered version thereof, from the compensated adapter current error signal, to produce the voltage error signal V_ERR that is provided to the PWM controller, spits the fed back in first complex double pole Z_A.

4. The voltage regulator of claim 3, the splitting of the first complex double pole Z_A improves dynamic performance of the voltage regulator and simplifies compensation performed by the compensator, compared to if the first complex double pole Z_A were not split.

5. The voltage regulator of claim 1, wherein the voltage regulator comprises a narrow voltage direct current (NVDC) battery charger.

6. The voltage regulator of claim 1, wherein the power stage is selected from the group consisting of a buck power stage, a boost power stage and a buck-boost power stage.

7. A voltage regulator, comprising:

an input LC filter that receives an adapter voltage V_A from an adapter and in dependence thereon produces an input voltage V_IN;

a power stage that receives the input voltage V_IN from the input LC filter;

an output LC filter that is coupled to an output of the power stage and outputs an output voltage V_O for use in at least one of powering a load or charging a battery;

a pulse width modulation (PWM) controller that drives the power stage with a PWM signal; and

a regulation mode selector that

(a.1) selects one of a plurality of operational modes for the voltage regulator, one of which is an adaptor current limit regulation mode, and

(a.2) produces a voltage error signal V_ERR that is provided to the PWM controller and used by the PWM controller to produce the PWM signal that drives the power stage;

wherein when the voltage regulator operates in the adaptor current limit regulation mode

(b.1) an adaptor current sense voltage V_ACS, which is indicative of an adapter current I_A, is compared to an adapter current reference voltage V_{AC_REF} to produce an adapter current error signal V_{AC_ERR},

(b.2) a compensator receives the adapter current error signal V_{AC_ERR} and outputs a compensated adapter current error signal, and

(b.3) the input voltage V_IN, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

8. The voltage regulator of claim 7, wherein a gain factor (K) is applied to produce a high pass filtered version of the input voltage V_IN that is added to the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

9. The voltage regulator of claim 7, wherein when the voltage regulator operates in the adaptor current limit regulation mode

an inner current feedback loop substantially nulls out both a first complex double pole Z_A caused by the input LC filter and a second complex double pole Z_O caused by the output LC filter;

an outer current feedback loop that regulates the adaptor current I_A feeds back in the first complex double pole Z_A caused by the input LC filter; and

the adding of the input voltage V_IN, or the high pass filtered version thereof, to the compensated adapter current error signal, to produce the voltage error signal V_ERR that is provided to the PWM controller, spits the fed back in first complex double pole Z_A.

10. The voltage regulator of claim 9, wherein the splitting of the first complex double pole Z_A improves dynamic performance of the voltage regulator and simplifies compensation performed by the compensator, compared to if the first complex double pole Z_A were not split.

11. The voltage regulator of claim 7, wherein the voltage regulator comprises a narrow voltage direct current (NVDC) battery charger.

12. The voltage regulator of claim 7, wherein the power stage is selected from the group consisting of a buck power stage, a boost power stage and a buck-boost power stage.

13. A method for use with a voltage regulator, comprising:

receiving an adaptor voltage V_A from an adapter;

filtering the adaptor voltage V_A to produce an input voltage V_IN;

using a power stage of the voltage regulator to produce an output voltage V_O in dependence on the input voltage V_IN, the output voltage V_O for use in at least one of powering a load or charging a battery;

using a pulse width modulation (PWM) controller to drive the power stage with a PWM signal;

selecting one of a plurality of operational modes for the voltage regulator, one of which is an adaptor current limit regulation mode;

producing a voltage error signal V_ERR that is provided to the PWM controller and used by the PWM controller to produce the PWM signal that drives the power stage;

wherein when the operational mode selected for the voltage regulator is the adaptor current limit regulation mode

comparing an adaptor current sense voltage V_ACS, which is indicative of an adapter current I_A, to an adapter current reference voltage V_{AC_REF} to produce an adapter current error signal V_{AC_ERR};

producing a compensated adapter current error signal in dependence on the adapter current error signal V_{AC_ERR}; and

subtracting the adaptor current sense voltage V_ACS, or a high pass filtered version thereof, from the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

14. The method of claim 13, further comprising high pass filtering the adaptor current sense voltage V_ACS and applying a gain factor (K) to produce a high pass filtered version of the adaptor current sense voltage V_ACS that is subtracted from the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

15. The method of claim 13, wherein:

the receiving the adaptor voltage V_A and the filtering the adaptor voltage V_A are performed by an input LC filter,

an output LC filter, that is coupled to an output of the power stage, outputs the output voltage V_O for use in at least one of powering a load or charging a battery;

when the operational mode selected for the voltage regulator is the adaptor current limit regulation mode

an inner current feedback loop substantially nulls out both a first complex double pole Z_A caused by the input LC filter and a second complex double pole Z_O caused by the output LC filter;

an outer current feedback loop that regulates the adaptor current I_A feeds back in the first complex double pole Z_A caused by the input LC filter; and

the subtracting out of the adaptor current sense voltage V_ACS, or the high pass filtered version thereof, from the compensated adapter current error signal, to produce the voltage error signal V_ERR that is provided to the PWM controller, spits the fed back in first complex double pole Z_A.

16. The method of claim 15, the splitting of the first complex double pole Z_A improves dynamic performance of the voltage regulator and simplifies the producing the compensated adapter current error signal, compared to if the first complex double pole Z_A were not split.

17. The method of claim 13, wherein the voltage regulator comprises a narrow voltage direct current (NVDC) battery charger.

18. A method for use with a voltage regulator, comprising:

receiving an adaptor voltage V_A from an adapter;

filtering the adaptor voltage V_A to produce an input voltage V_IN;

using a power stage of the voltage regulator to produce an output voltage V_O in dependence on the input voltage V_IN, the output voltage V_O for use in at least one of powering a load or charging a battery;

using a pulse width modulation (PWM) controller to drive the power stage with a PWM signal;

selecting one of a plurality of operational modes for the voltage regulator, one of which is an adaptor current limit regulation mode;

producing a voltage error signal V_ERR that is provided to the PWM controller and used by the PWM controller to produce the PWM signal that drives the power stage;

wherein when the operational mode selected for the voltage regulator is the adaptor current limit regulation mode

comparing an adaptor current sense voltage V_ACS, which is indicative of an adapter current I_A, to an adapter current reference voltage V_{AC_REF} to produce an adapter current error signal V_{AC_ERR};

producing a compensated adapter current error signal in dependence on the adapter current error signal V_{AC_ERR}; and

adding the input voltage V_IN, or a high pass filtered version thereof, to the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

19. The method of claim 18, further comprising high pass filtering the input voltage V_IN and applying a gain factor (K) to produce a high pass filtered version of the input voltage V_IN that is added to the compensated adapter current error signal to produce the voltage error signal V_ERR that is provided to the PWM controller.

20. The method of claim 18, wherein:

the receiving the adaptor voltage V_A and the filtering the adaptor voltage V_A are performed by an input LC filter,

an output LC filter, that is coupled to an output of the power stage, outputs the output voltage V_O for use in at least one of powering a load or charging a battery;

when the operational mode selected for the voltage regulator is the adaptor current limit regulation mode

an inner current feedback loop substantially nulls out both a first complex double pole Z_A caused by the input LC filter and a second complex double pole Z_O caused by the output LC filter;

an outer current feedback loop that regulates the adaptor current I_A feeds back in the first complex double pole Z_A caused by the input LC filter; and

the adding of the input voltage V_IN, or the high pass filtered version thereof, to the compensated adapter current error signal, to produce the voltage error signal V_ERR that is provided to the PWM controller, spits the fed back in first complex double pole Z_A.

21. The method of claim 18, wherein the splitting of the first complex double pole Z_A improves dynamic performance of the voltage regulator and simplifies the producing the compensated adapter current error signal, compared to if the first complex double pole Z_A were not split.

22. The method of claim 18, wherein the voltage regulator comprises a narrow voltage direct current (NVDC) battery charger.