Methods and apparatus for scrambling symbols over multi-lane serial interfaces

• US 9,749,159 B2
• Filed: 12/07/2015
• Issued: 08/29/2017
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Whitby-Strevens, Colin
• Primary Examiner(s): Vlahos, Sophia
• Application Number:
  US14/961,501
• Publication Number:
  US 20160164705A1
• Time in Patent Office: 631 Days
• CPC Class Codes: G06F 3/14 Digital output to display device ; Cooperation and interconnection of the display device with other functional units
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 2370/12 Use of DVI or HDMI protocol in interfaces along the display data pipeline
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: H04L 25/03866 using scrambling
• CPC Class Codes: H04L 25/03872 Parallel scrambling or descrambling

Abstract

Methods and apparatus for scrambling symbols over multi-lane serial interfaces in order to improve undesired electromagnetic emissions. In one embodiment the scrambling is based on a seed value associated with each lane. In a second embodiment, the scrambling values are selected from various taps of a scrambling component, where the selection is based on the associated lane. In still a third embodiment, each lane is associated with a distinct scrambling component.

Claims

1. An apparatus configured to scramble a plurality of symbols, comprising:

a first interface that comprises a plurality of lanes, where in a legacy mode each lane is characterized by a common encoding mechanism configured to encode one or more symbols based on a running disparity, and in a non-legacy mode each lane is configured to scramble one or more symbols based on a corresponding distinct linear feedback shift register (LFSR) mechanism;

a processor in data communication with the first interface and configured to;

when in the non-legacy mode;

transmit a plurality of symbols via the plurality of lanes, where the plurality of symbols are scrambled according to the corresponding distinct LFSR mechanism associated with each lane;

wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and

when in the legacy mode;

transmit another plurality of symbols compatible with legacy systems via the plurality of lanes, where the another plurality of symbols are encoded according to the common encoding mechanism;

wherein the another plurality of symbols are configured to be decoded by the receiver based on the running disparity, responsive to reception of the another plurality of symbols.

2. The apparatus of claim 1, wherein each corresponding distinct LFSR mechanism is based on a seed that corresponds to each lane, and the common encoding mechanism comprises an 8B10B line code.

3. The apparatus of claim 2, wherein each seed that corresponds to each of the corresponding distinct LFSR mechanisms results in a different initial value.

4. The apparatus of claim 2, wherein the plurality of symbols are scrambled with different bits of its corresponding distinct LFSR mechanism, based on a given lane of the plurality of lanes.

5. The apparatus of claim 3, wherein each corresponding distinct LFSR mechanism comprises a self-synchronizing LFSR.

6. The apparatus of claim 5, wherein the self-synchronizing LFSR is configured to reset when a pre-agreed scrambler reset seed is sent or received.

7. The apparatus of claim 1, wherein the processor in data communication with the first interface is further configured to negotiate whether to operate according to the non-legacy mode or the legacy mode with the receiver.

8. The apparatus of claim 7, wherein the negotiation defaults to the legacy mode.

9. A method for scrambling a plurality of symbols, comprising:

determining whether to operate in a non-legacy mode or a legacy mode;

when operating in the non-legacy mode;

scrambling a plurality of symbols via each lane of a plurality of lanes, each lane operating according to a corresponding distinct linear feedback shift register (LFSR) mechanism; and

transmitting the plurality of symbols via the plurality of lanes;

wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and

when operating in the legacy mode;

encoding another plurality of symbols via the plurality of lanes according to a common encoding scheme based on a running disparity;

transmitting the another plurality of symbols via the plurality of lanes;

wherein the another plurality of symbols are configured to be decoded by the receiver based on the running disparity, responsive to reception of the another plurality of symbols.

10. The method of claim 9, wherein the scrambling of the plurality of symbols is based on a seed associated with each lane, and the common encoding scheme comprises an 8B10B line code.

11. The method of claim 10, further comprising initializing each corresponding distinct LFSR mechanism with a different initial value based on the seed that corresponds to each lane.

12. The method of claim 11, wherein the initializing of each corresponding distinct LFSR mechanism is performed responsive to sending or receiving a pre-agreed scrambler reset seed.

13. The method of claim 10, wherein the scrambling of the plurality of symbols is based on different bits of the LFSR mechanism used in each lane.

14. A method of scrambling a plurality of symbols, comprising:

determining whether to operate in a non-legacy mode or to default to operation in a legacy mode;

when operating in the non-legacy mode;

scrambling a plurality of symbols via each lane of a plurality of lanes according to an uncorrelated scrambling mechanism; and

transmitting the plurality of symbols via the plurality of lanes;

wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and

otherwise, when operating in the legacy mode;

scrambling another plurality of symbols via a correlated scrambling mechanism;

wherein the another plurality of symbols are configured to be descrambled by the receiver, responsive to reception of the another plurality of symbols.

15. The method of claim 14, wherein the scrambling of the plurality of symbols according to the uncorrelated scrambling mechanism comprises scrambling each lane of the plurality of lanes with a different seed;

and

the scrambling of the another plurality of symbols via the correlated scrambling mechanism comprises scrambling each lane of the plurality of lanes with a common seed.

16. The method of claim 14, further comprising encoding the plurality of symbols according to an 8B10B line coding scheme or encoding the another plurality of symbols according to the 8B10B line coding scheme.

17. The method of claim 14, further comprising, when operating in the non-legacy mode, initializing at least one self-synchronizing linear feedback shift register (LFSR).

18. The method of claim 14, wherein the determining of whether to operate in the non-legacy mode comprises executing a non-scrambled transaction.

19. The method of claim 14, wherein the determining of whether to operate in the non-legacy mode comprises executing an out-of-band transaction.