Cubic phase, nitrogen-based compound semiconductor films

• US 9,752,252 B1
• Filed: 09/21/2016
• Issued: 09/05/2017
• Est. Priority Date: 01/21/2009
• Status: Active Grant

• Current Assignee: UNM Rainforest Innovations (f/k/a STC.UNM) (The University of New Mexico)
• Original Assignee: UNM Rainforest Innovations (f/k/a STC.UNM) (The University of New Mexico)
• Inventors: Lee, Seung-Chang, Brueck, Steven R. J.
• Primary Examiner(s): Pert, Evan
• Application Number:
  US15/272,153
• Time in Patent Office: 349 Days
• CPC Class Codes: C30B 25/04 Pattern deposit, e.g. by using masks
• CPC Class Codes: C30B 25/18 characterised by the substrate
• CPC Class Codes: C30B 25/186 being specially pre-treated by, e.g. chemical or physical means
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02647 Lateral overgrowth
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/06 characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/2003 Nitride compounds

Abstract

A method of epitaxially growing nitrogen-based compound semiconductor thin films on a semiconductor substrate, which is periodically patterned with grooves. The method can provide an epitaxial growth of a first crystalline phase epitaxial film on the substrate, and block the growth of an initial crystalline phase with barrier materials prepared at the sides of the grooves. Semiconductor devices employing the epitaxial films are also disclosed.

Claims

1. A semiconductor device, comprising:

a silicon-on-insulator substrate comprising a silicon layer over an insulating layer;

a plurality of grooves within the silicon layer;

a mask structure comprising a plurality of openings therein over the silicon layer, wherein the plurality of openings in the mask structure are aligned with the plurality of grooves;

an epitaxial layer in each of the plurality of grooves in the silicon layer, wherein the epitaxial layer comprises hexagonal phase material and cubic phase material, the cubic phase material extending through each of the plurality of openings in the mask structure, growth of the hexagonal phase material having been blocked by the mask structure in a manner so that the hexagonal phase material does not extend above the mask structure.

2. The semiconductor device of claim 1, wherein the mask comprises substantially vertical sidewalls.

3. The semiconductor device of claim 1, wherein the mask comprises inclined sidewalls with a sufficient incline to block the growth of the hexagonal phase material above the masking structure.

4. The semiconductor device of claim 1, wherein the cubic phase material is coalesced to form a wide area film.

5. The semiconductor device of claim 1, wherein the cubic phase material forms a plurality of island films.

6. The semiconductor device of claim 1, where the silicon layer of the silicon-on-insulator substrate is oriented to a (001) silicon facet.

7. The semiconductor device of claim 6, where the grooves comprise sidewalls of opposing {111} crystal planes of the silicon layer.

8. The semiconductor device of claim 1, wherein the mask structure is formed from a single material.

9. A semiconductor device, comprising:

a silicon-on-insulator substrate comprising a silicon layer over an insulating layer;

a plurality of grooves within the silicon layer where the grooves are formed with two opposing faces and with a bottom face that is parallel to the initial face of the silicon layer;

a mask structure comprising a plurality of openings therein over the silicon layer, wherein the plurality of openings in the mask structure are aligned with the plurality of grooves;

an epitaxial layer in each of the plurality of grooves in the silicon layer, wherein the epitaxial layer comprises hexagonal phase material and cubic phase material, the cubic phase material extending through each of the plurality of openings in the mask structure, growth of the hexagonal phase material having been blocked by the mask structure in a manner so that the hexagonal phase material does not extend above the mask structure.

10. The semiconductor device of claim 9, wherein the mask comprises substantially vertical sidewalls.

11. The semiconductor device of claim 9, wherein the mask comprises inclined sidewalls with a sufficient incline to block the growth of the hexagonal phase material above the masking structure.

12. The semiconductor device of claim 9, wherein the cubic phase material is coalesced to form a wide area film.

13. The semiconductor device of claim 9, wherein the cubic phase material forms a plurality of island films.

14. The semiconductor device of claim 9, where the silicon layer of the silicon-on-insulator substrate is oriented to a (001) silicon facet.

15. The semiconductor device of claim 14, where the grooves comprise sidewalls of opposing {111} crystal planes of the silicon layer.

16. The semiconductor device of claim 9, wherein the mask structure is formed from a single material.