Semiconductor device and method of fabricating the same

• US 9,754,938 B1
• Filed: 06/21/2016
• Issued: 09/05/2017
• Est. Priority Date: 05/19/2016
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Feng, Li-Wei, Huang, Tong-Jyun, Tsai, Shih-Hung, Wu, Jia-Rong, Chan, Tien-Chen, Lin, Yu-Shu, Jenq, Jyh-Shyang
• Primary Examiner(s): Sandvik, Benjamin
• Application Number:
  US15/187,800
• Time in Patent Office: 441 Days
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823437 with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
• CPC Class Codes: H01L 27/0886 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Abstract

A semiconductor device includes a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures.

Claims

1. A method of fabricating a semiconductor device, comprising:

providing a substrate, having a first region and a second region;

forming a plurality of fin-shaped structures, respectively disposed in the first region and the second region of the substrate;

forming a protection layer, conformally covering the substrate and the fin-shaped structures;

forming an interlayer dielectric in the first region and the second region, wherein the protection layer in the first region and the second region is partially exposed from the interlayer dielectric;

forming an etch mask, covering the fin-shaped structures in the second region; and

etching the protection layer exposed from the interlayer dielectric in the first region before removing the etch mask;

growing an epitaxial layer on each of the fin-shaped structures exposed from the interlayer dielectric and in the first region after the step of etching the protection layer; and

forming two gate metal layers, respectively covering the epitaxial layers in the first region and the protection layer in the second region.

2. The method of fabricating the semiconductor device of claim 1, further comprising forming two dummy gate structures respectively disposed in the first region and the second region before the step of forming the interlayer dielectric.

3. The method of fabricating the semiconductor device of claim 1, wherein the protection layer in the first region and exposed from the interlayer dielectric is completely removed during the step of etching the protection layer.

4. The method of fabricating the semiconductor device of claim 1, further comprising etching sidewalls of each of the fin-shaped structures in the first region during the step of etching the protection layer so as to generate stair-shaped sidewalls on the surfaces of the fin-shaped structures in the first region.

5. A method of fabricating a semiconductor device, comprising:

providing a substrate, having a first region and a second region;

forming a plurality of fin-shaped structures, respectively disposed in the first region and the second region of the substrate;

forming a protection layer, conformally covering the substrate and the fin-shaped structures;

forming an interlayer dielectric in the first region and the second region, wherein the protection layer in the first region and the second region is partially exposed from the interlayer dielectric;

forming an etch mask, covering the fin-shaped structures in the second region;

etching the protection layer exposed from the interlayer dielectric in the first region before removing the etch mask;

growing an epitaxial layer on each of the fin-shaped structures exposed from the interlayer dielectric and in the first region after the step of etching the protection layer;

depositing a dielectric layer, conformally covering each of the epitaxial layers in the first region and the etch mask in the second region;

removing the etch mask and the dielectric layer in the second region; and

etching the protection layer exposed from the interlayer dielectric and in the second region before removing the dielectric layer in the first region.

6. The method of fabricating the semiconductor device of claim 5, further comprising etching sidewalls of each of the fin-shaped structures in the second region during the step of etching the protection layer in the second region so as to generate stair-shaped sidewalls on the surfaces of the fin-shaped structures in the second region.

7. The method of fabricating the semiconductor device of claim 5,

wherein after the step of etching the protection layer in the second region, the method further comprises:

growing another epitaxial layers on each of the fin-shaped structures exposed from the interlayer dielectric and in the second region before removing the dielectric layer.

8. A method of fabricating a semiconductor device, comprising:

providing a substrate, having a first region and a second region;

forming a plurality of fin-shaped structures, respectively disposed in the first region and the second region of the substrate;

forming a protection layer, conformally covering the substrate and the fin-shaped structures;

forming an interlayer dielectric in the first region and the second region, wherein the protection layer in the first region and the second region is partially exposed from the interlayer dielectric;

forming an etch mask, covering the fin-shaped structures in the second region;

etching the protection layer exposed from the interlayer dielectric in the first region before removing the etch mask;

growing an epitaxial layer on each of the fin-shaped structures exposed from the interlayer dielectric and in the first region after the step of etching the protection layer; and

growing a plurality of another epitaxial layers, respectively disposed on the epitaxial layers in the first region and on the fin-shaped structures in the second region.