Systems and methods for phase noise mitigation

• US 9,755,692 B2
• Filed: 05/05/2015
• Issued: 09/05/2017
• Est. Priority Date: 08/14/2013
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Kumu Networks, Inc.
• Inventors: Choi, Jung-Il, Jain, Mayank, Mehlman, Jeffrey, Shalizi, Joseph
• Primary Examiner(s): Timory, Kabir A
• Application Number:
  US14/704,746
• Publication Number:
  US 20150236750A1
• Time in Patent Office: 854 Days
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver
• CPC Class Codes: H04B 15/00 Suppression or limitation of noise or interference by means associated with receiver H04B1/10
• CPC Class Codes: H04B 2001/485 inhibiting unwanted transmission
• CPC Class Codes: H04B 7/0413 MIMO systems
• CPC Class Codes: H04L 5/14 Two-way operation using the same type of signal, i.e. duplex

Abstract

A system for phase noise mitigated communication including a primary transmitter that converts a digital transmit signal to an analog transmit signal, a primary receiver that receives an analog receive signal and converts the analog receive signal to a digital receive signal, an analog self-interference canceller that samples the analog transmit signal, generates an analog self-interference cancellation signal based on the analog transmit signal, and combines the analog self-interference cancellation signal with the analog receive signal and a digital self-interference canceller that samples the digital transmit signal, generates a digital self-interference cancellation signal based on the digital transmit signal, and combines the digital self-interference cancellation signal with the digital receive signal.

Claims

1. A system for phase noise mitigated communication comprising:

a primary transmitter, coupled to a digital transmit path of an electronic device, that converts a digital transmit signal received via the digital transmit path to an analog transmit signal, and transmits the analog transmit signal via an analog transmit path;

a primary receiver, coupled to a digital receive path of the electronic device, that receives an analog receive signal via an analog receive path, and converts the analog receive signal to a digital receive signal;

an analog self-interference canceller, coupled to the analog receive path and the analog transmit path;

wherein the analog self-interference canceller samples the analog transmit signal, generates an analog self-interference cancellation signal based on the analog transmit signal, and combines the analog self-interference cancellation signal with the analog receive signal; and

a digital self-interference canceller, comprising an embedded pilot analyzer that detects an embedded pilot in the digital receive signal and analyzes the embedded pilot to determine phase noise data, the digital self-interference canceller coupled to the digital transmit path and the digital receive path;

wherein the phase noise data is partially based on a self-interference component of the digital receive signal;

wherein the digital self-interference canceller samples the digital transmit signal, generates a digital self-interference cancellation signal based on the digital transmit signal, and combines the digital self-interference cancellation signal with the digital receive signal;

wherein the digital self-interference canceller generates the digital self-interference cancellation signal according to a digital transform configuration;

wherein the digital self-interference canceller adapts the digital transform configuration based on the phase noise data.

2. The system of claim 1, wherein the primary receiver is an RF wireless receiver and the primary transmitter is an RF wireless transmitter.

3. The system of claim 1, wherein the primary transmitter comprises a digital-to-analog converter and a frequency upconverter;

wherein the primary receiver comprises an analog-to-digital converter and a frequency downconverter;

wherein the frequency upconverter and the frequency downconverter share a local oscillator.

4. The system of claim 1, wherein the analog self-interference canceller generates the analog self-interference cancellation signal by combining filtered, scaled, and delayed versions of the analog transmit signal.

5. The system of claim 1, further comprising a secondary transmitter coupled to an output of the digital self-interference canceller and to the analog receive path;

wherein the secondary transmitter converts an output of the digital self-interference canceller to a digitally sourced analog self-interference cancellation signal and combines the digitally sourced analog self-interference cancellation signal with the analog receive signal.

6. The system of claim 5, wherein the output is the digital self-interference cancellation signal.

7. The system of claim 5, wherein the primary transmitter, the secondary transmitter, and the primary receiver share a local oscillator.

8. The system of claim 7, further comprising a secondary receiver coupled to the analog transmit signal path and coupled to an input to the digital self-interference canceller;

wherein the secondary receiver samples the analog transmit signal to produce an analog-sourced digital signal.