Managing a switch fabric

• US 9,755,907 B2
• Filed: 09/28/2011
• Issued: 09/05/2017
• Est. Priority Date: 09/28/2011
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Cavanna, Vincent E., Frey, Michael G.
• Primary Examiner(s): Yao, Kwang B
• Assistant Examiner(s): Chowdhury, Harun
• Application Number:
  US14/238,573
• Publication Number:
  US 20140198631A1
• Time in Patent Office: 2,169 Days
• Field of Search: 370217, 370218, 370230, 370235, 370244, 370254, 370360
• CPC Class Codes: H04L 41/06 Management of faults, events, alarms or notifications
• CPC Class Codes: H04L 41/0661 by reconfiguring faulty entities
• CPC Class Codes: H04L 41/0806 for initial configuration or provisioning, e.g. plug-and-play
• CPC Class Codes: H04L 41/0836 to enhance reliability, e.g. reduce downtime
• CPC Class Codes: H04L 41/0893 Assignment of logical groups to network elements
• CPC Class Codes: H04L 41/12 Discovery or management of network topologies
• CPC Class Codes: H04L 41/34 Signalling channels for network management communication
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/65 Re-configuration of fast packet switches

Abstract

In a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, a first configuration set and a second configuration set, each comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, are generated. In addition, a determination as to which of the first configuration set and the second configuration set the plurality of fabric chips are to use is made an instruction is communicated to each of the fabric chips to use the determined one of the first configuration set and the second configuration set.

Claims

1. A method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, said method comprising:

generating a first configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet;

generating a second configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, wherein the second configuration set differs from the first configuration set;

while the plurality of fabric chips are using the first configuration set, determining that the plurality of fabric chips are to use the second configuration set; and

communicating an instruction to each of the plurality of fabric chips to use the second configuration set, wherein the instruction includes a delay instruction that causes the plurality of fabric chips to begin to use the second configuration set at the same time.

2. The method according to claim 1, further comprising:

storing respective ones of the first configuration set and the second configuration set in each of the plurality of fabric chips.

3. The method according to claim 2, wherein the port interfaces that receive the incoming packet is to control which of the first configuration set and the second configuration set is to be used by varying a setting of a predetermined bit in each of the port interfaces, and wherein communicating an instruction to each of the plurality of fabric chips further comprises communicating an instruction to each of the plurality of fabric chips to set the bit for the second configuration set to be used.

4. The method according to claim 3, wherein communicating an instruction to each of the plurality of fabric chips further comprises communicating an instruction to each of the plurality of fabric chips to atomically set the bit for the second configuration set to be used following a clearing out of packets whose port resolutions have been calculated using the first configuration set from the switch fabric.

5. The method according to claim 3, wherein the plurality of port interfaces in each of the plurality of fabric chips are in communication with each other over a crossbar and wherein the incoming packet is to be received into one of the plurality of port interfaces, said method further comprising:

in the port interface at which the incoming packet is received, using one of the first configuration set and the second configuration set to identify which of the port interfaces on an opposite side of the crossbar are to receive the packet and to set a field in the packet that operates as a pointer to which of the first configuration set and the second configuration set was used by the receiving port interface to enable the port interfaces on the opposite side of the crossbar to perform an operation on the packet that is coherent with the configuration set used by the receiving port interface.

6. The method according to claim 5, wherein the packet contains an identification of at least one destination node chip that is to receive the packet, and wherein using one of the first configuration set and the second configuration set further comprises comparing the identification of the at least one destination node chip contained in the identification and a preprogrammed correlation between the port interfaces and the destination node chips.

7. The method according to claim 1, further comprising:

receiving status information from the plurality of fabric chips; and

wherein generating the second configuration set further comprises generating the second configuration set based upon the received status information.

8. The method according to claim 7, wherein generating the second configuration set further comprises generating the second configuration set to substantially optimize flow of packets through the plurality of fabric chips following a change to the switch fabric.

9. The method according to claim 1, further comprising:

determining that a fault has occurred in the switch fabric; and

wherein generating the second configuration set further comprises generating the second configuration set to substantially optimize rerouting of the packets through the switch fabric while accounting for the fault.

10. An apparatus for managing use of a switch fabric composed of a plurality of interconnected fabric chips, each of said plurality of fabric chips comprising a respective plurality of port interfaces interconnected through a crossbar, said apparatus comprising:

at least one module to receive status information from the port interfaces of the plurality of fabric chips, to generate a first configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, to generate a second configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, to determine, while the plurality of fabric chips are using the first configuration set, that the plurality of fabric chips are to use the second configuration set, and to communicate an instruction to each of the fabric chips to use the second configuration set, wherein the instruction includes a delay instruction that causes the plurality of fabric chips to begin to use the second configuration set at the same time; and

a processor to implement the at least one module.

11. The apparatus according to claim 10, wherein the at least one module is to communicate an instruction to each of the plurality of fabric chips to atomically set the bit for the second configuration set to be used following a clearing out of packets whose port resolutions have been calculated using the first configuration set from the switch fabric.

12. The apparatus according to claim 10, wherein the at least one module is to generate the second configuration set based upon the received status information.

13. The apparatus according to claim 10, wherein the at least one module is to determine that a fault has occurred in the switch fabric based upon the received status information and to generate the second configuration set to substantially optimizes rerouting of received packets through the switch fabric while accounting for the fault.

14. A non-transitory computer readable storage medium on which is embedded a computer program, said computer program implementing a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, said computer program comprising a set of instructions to:

generate a first configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet;

generate a second configuration set comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, wherein the second configuration set differs from the first configuration set;

determine, while the plurality of fabric chips are using the first configuration set, that the plurality of fabric chips are to use the second configuration set; and

communicate an instruction to each of the fabric chips to use the second configuration set, wherein the instruction includes a delay instruction that causes the plurality of fabric chips to begin to use the second configuration set at the same time.

15. The non-transitory computer readable storage medium according to claim 14, said computer program further comprising a set of instructions to:

receive status information from the plurality of fabric chips;

determine that a fault has occurred in the switch fabric from the received status information; and

generate the second configuration set to substantially optimize rerouting of the packets through the switch fabric while accounting for the fault.