Line buffer unit for image processor
First Claim
Patent Images
1. An apparatus, comprising:
- a line buffer unit circuit comprised of a plurality of line buffer interface unit circuits, each line buffer interface unit circuit to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory, the line buffer unit circuit having programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory, wherein said line buffer unit circuit includes control logic circuitry to;
assign at least one of the line buffer interface unit circuits to a free pool, that includes free ones of the line buffer interface unit circuits, after said at least one of the line buffer interface unit circuits has serviced its last consumer; and
,assign said at least one of the line buffer interface unit circuits from the free pool to another line group.
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Abstract
An apparatus is described that include a line buffer unit composed of a plurality of a line buffer interface units. Each line buffer interface unit is to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory. The line buffer unit has programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory.
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Citations
24 Claims
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1. An apparatus, comprising:
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a line buffer unit circuit comprised of a plurality of line buffer interface unit circuits, each line buffer interface unit circuit to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory, the line buffer unit circuit having programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory, wherein said line buffer unit circuit includes control logic circuitry to; assign at least one of the line buffer interface unit circuits to a free pool, that includes free ones of the line buffer interface unit circuits, after said at least one of the line buffer interface unit circuits has serviced its last consumer; and
,assign said at least one of the line buffer interface unit circuits from the free pool to another line group. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A non-transitory machine readable storage medium containing program code for compilation and loading of a formatted description of an electronic circuit for fabrication into a semiconductor chip thereby causing the semiconductor chip to operate as the electronic circuit, the electronic circuit comprising:
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a line buffer unit comprised of a plurality of a line buffer interface units, each line buffer interface unit to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory, the line buffer unit having programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory, wherein said line buffer unit includes control logic circuitry to; assign at least one of the line buffer interface units to a free pool, that includes free ones of the line buffer interface units, after said at least one of the line buffer interface units has serviced its last consumer; and
,assign said at least one of the line buffer interface units from the free pool to another line group. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A computing system, comprising:
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a plurality of processing cores; an image processor, said image processor comprising a line buffer unit comprised of a plurality of a line buffer interface units, each line buffer interface unit to handle one or more requests by a respective producer to store a respective line group in a memory and handle one or more requests by a respective consumer to fetch and provide the respective line group from memory, the line buffer unit having programmable storage space whose information establishes line group size so that different line group sizes for different image sizes are storable in memory, wherein said line buffer unit includes control logic circuitry to; assign at least one of the line buffer interface units to a free pool, that includes free ones of the line buffer interface units, after said at least one of the line buffer interface units has serviced its last consumer; and
,assign said at least one of the line buffer interface units from the free pool to another line group. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification