Programmable test instrument
First Claim
1. A test instrument comprising:
- programmable logic programmed to act as an interface to a device under test, the programmable logic being configurable to perform one or more tests on the device, the programmable logic specifying a number of input ports and a number of output ports on the interface to the device;
a first processing system that is programmable to run one or more test programs to test the device via the interface; and
a second processing system that is dedicated to device testing, the second processing system comprising a plurality of embedded processing devices dedicated to device testing, the embedded processing devices being programmable to run one or more test programs to test the device via the interface;
wherein the second processing system is configured to transmit test results from the programmable logic to the first processing system;
wherein the programmable logic is configurable to execute one or more of the tests separately of the second processing system; and
wherein the first processing system has a first testing latency, the second processing system has a second testing latency, and the programmable logic has a third testing latency, the first testing latency being greater than the second testing latency, and the second testing latency being greater than the third testing latency.
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Accused Products
Abstract
In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to the test instrument, and that is programmed to control operation of the test instrument, a second processing system that is dedicated to device testing, the second processing system being programmable to run one or more test programs to test the device, and programmable logic configured to act as an interface between the test instrument and the device, the programmable logic being configurable to perform one or more tests on the device. The first processing system and the second processing system are programmable to access the device via the programmable logic.
253 Citations
19 Claims
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1. A test instrument comprising:
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programmable logic programmed to act as an interface to a device under test, the programmable logic being configurable to perform one or more tests on the device, the programmable logic specifying a number of input ports and a number of output ports on the interface to the device; a first processing system that is programmable to run one or more test programs to test the device via the interface; and a second processing system that is dedicated to device testing, the second processing system comprising a plurality of embedded processing devices dedicated to device testing, the embedded processing devices being programmable to run one or more test programs to test the device via the interface; wherein the second processing system is configured to transmit test results from the programmable logic to the first processing system; wherein the programmable logic is configurable to execute one or more of the tests separately of the second processing system; and wherein the first processing system has a first testing latency, the second processing system has a second testing latency, and the programmable logic has a third testing latency, the first testing latency being greater than the second testing latency, and the second testing latency being greater than the third testing latency. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A test instrument comprising:
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a first tier system for interacting with an environment external to the test instrument, the first tier system being programmable to perform testing operations on a device; a second tier system comprising a plurality of embedded processing devices dedicated to device testing, the embedded devices being programmable to perform testing operations on the device; and a third tier system that is programmed to act as an interface to the device, the third tier system being configurable to perform testing operations on the device, the first tier system and the second tier system being programmed to access the device through the interface; wherein the third tier system defines at least a number of input ports and a number of output ports of the interface to the device; wherein the second tier system is configured to transmit test results from the third tier system to the first tier system; and wherein the third tier system is configurable to execute one or more of the testing operations separately of the second tier system; wherein the first tier system has a first testing latency, the second tier system has a second testing latency, and the third tier system has a third testing latency, the first testing latency being greater than the second testing latency, and the second testing latency being greater than the third testing latency. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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Specification