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Conditional activation and deactivation of a microprocessor

  • US 9,760,146 B2
  • Filed: 01/08/2007
  • Issued: 09/12/2017
  • Est. Priority Date: 01/08/2007
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a hardware portion including a medium access control (MAC) device configured to perform packet processing on received data without requiring any processor, and a beacon process module configured to filter out non-beacon packets from received data, said beacon process module being further configured to deactivate after processing a packet and to reactivate in anticipation of receipt of a packet for processing, said hardware portion further configured to selectively decode said received data;

    a microprocessor configured to perform data processing on decoded data, wherein said microprocessor is conditionally activated to perform said data processing and is conditionally deactivated when not performing said data processing; and

    an output portion configured to output said processed data.

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