High performance system for selective merging of dataframe segments

• US 9,760,304 B2
• Filed: 01/05/2016
• Issued: 09/12/2017
• Est. Priority Date: 09/06/2013
• Status: Active Grant

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Skyera, LLC (Western Digital Corporation), Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Flinsbaugh, Jack W., Jones, Justin, Mullendore, Rodney N., Tomlin, Andrew J.
• Primary Examiner(s): TSUI, DANIEL D
• Application Number:
  US14/988,440
• Publication Number:
  US 20160132248A1
• Time in Patent Office: 616 Days
• Field of Search: None
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/06 Digital input from, or digital output to, record carriers , e.g. RAID, emulated record carriers or networked record carriers
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0661 Format or protocol conversion arrangements
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A method of writing data to a range of logical blocks in a storage medium includes: receiving a command including a starting logical block address, a value indicating a range of logical block addresses to be written, and a logical block of data; storing the logical block in a first temporary storage; generating a logical page by duplicating the logical block a plurality of times corresponding to a number of logical blocks in a logical page and transporting the generated logical page to a second temporary storage and storing the generated logical page in the second temporary storage; writing the generated logical page from the second temporary storage into the storage medium beginning from the starting logical block address; and performing a read-modify-write operation if the first write operation does not begin on a logical page boundary or the last write operation does not end on a logical page boundary.

Claims

1. A method of merging logical pages of data, the method comprising:

receiving a command comprising a starting logical block address, a value indicating a range of logical block addresses, and a write mask;

receiving a first plurality of logical blocks associated with the command;

dividing the write mask into portions corresponding to a number of logical blocks comprising a logical page;

obtaining a portion of the write mask corresponding to a current logical page;

constructing a first logical page based on the corresponding portion of the write mask using the first plurality of logical blocks; and

retrieving from a storage medium a second logical page comprising a second plurality of logical blocks;

generating a merged output logical page by merging logical blocks of the second logical page with logical blocks of the first logical page based on a corresponding logical page portion of the write mask beginning from the starting logical block address.

2. The method of claim 1, wherein if the values of a logical page portion of the write mask are all ones, the second logical page is outputted as the output logical page without being merged.

3. The method of claim 1, wherein if the values of a logical page portion of the write mask are all zeros, no logical page is outputted.

4. The method of claim 1, wherein the merging is performed over a plurality of data paths comprising a plurality of multiplexers.

5. The method of claim 1, wherein the write mask indicates for the range of logical block addresses beginning at and indexed from the starting logical block address which logical blocks of the first and second logical pages are to be merged into the output logical page.

6. The method of claim 5, wherein each logical page comprises a predetermined number of logical blocks;

and additional first logical pages are constructed based on corresponding logical page portions of the write mask and additional second logical pages are retrieved from the storage medium and a plurality of merged output logical pages is generated by merging corresponding first and second logical pages based on the range of logical block addresses and the predetermined number of logical blocks comprising a logical page.

7. The method of claim 5, wherein the addresses of the logical block to be merged are non-consecutive.

8. The method of claim 1, further comprising generating a cyclic redundancy code (CRC) for the merged output logical page by accumulating CRC data of the logical blocks merged into the output logical page on a block-by-block basis.

9. An apparatus for merging logical pages of data, the apparatus comprising:

a command input device configured to receive a command comprising a starting logical block address, a value indicating a range of logical block addresses, and a write mask;

a temporary storage configured to receive and store a first plurality of logical blocks associated with the command;

an input logic device configured to receive the first plurality of logical blocks associated with the command from the temporary storage and retrieve from a storage medium a second logical page comprising a second plurality of logical blocks, divide the write mask into portions corresponding to a number of logical blocks comprising a logical page, and construct a first logical page based on a corresponding portion of the write mask using the first plurality of logical blocks; and

data path circuitry comprising a plurality of data paths comprising a plurality of multiplexers, the circuitry configured to generate, using the plurality of data paths, a merged output logical page by merging, beginning from the starting logical block address, logical blocks of the second logical page with logical blocks of the first logical page based on a corresponding logical page portion of the write mask.

10. The apparatus of claim 9, wherein if the values of a logical page portion of the write mask are all ones, the second logical page is outputted as the output logical page without being merged.

11. The apparatus of claim 9, wherein if the values of a logical page portion of the write mask are all zeros, no logical page is outputted.

12. The apparatus of claim 9, further comprising a logical block counter configured to count a number of logical blocks processed beginning from the starting logical block address up to the value indicating the range, wherein the logical block counter generates an indication signal when the count value matches the logical block address range value received in the command.

13. The apparatus of claim 9, wherein the write mask indicates for the range of logical block addresses beginning at and indexed from the starting logical block address which logical blocks of the first and second logical pages are to be merged into the output logical page.

14. The apparatus of claim 13, wherein each logical page comprises a predetermined number of logical blocks;

and additional first logical pages are constructed based on corresponding logical page portions of the write mask and additional second logical pages are retrieved from the storage medium and a plurality of merged output logical pages is generated by merging corresponding first and second logical pages based on the range of logical block addresses and the predetermined number of logical blocks comprising a logical page.

15. The apparatus of claim 13, wherein the addresses of the logical blocks to be merged are non-consecutive.

16. The apparatus of claim 13, wherein the addresses of the logical blocks to be merged are consecutive.

17. The apparatus of claim 9, further comprising a second logic device configured to generate a cyclic redundancy code (CRC) for the output logical page by accumulating CRC data of the logical blocks merged into the output logical page on a block-by-block basis.