Method of assembling a capacitor assembly

• US 9,761,375 B2
• Filed: 05/15/2014
• Issued: 09/12/2017
• Est. Priority Date: 11/30/2010
• Status: Active Grant

• Current Assignee: Pratt & Whitney Canada Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Original Assignee: Pratt & Whitney Canada Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Inventors: Dooley, Kevin Allan, Bell, Joshua
• Primary Examiner(s): Trinh, Minh
• Application Number:
  US14/278,581
• Publication Number:
  US 20140245581A1
• Time in Patent Office: 1,216 Days
• CPC Class Codes: H01G 4/232 electrically connecting two or more layers of a stacked or rolled capacitor
• CPC Class Codes: H01G 4/236 leading through the housing, i.e. lead-through
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence
• CPC Class Codes: H01G 4/38 Multiple capacitors, i.e. structural combinations of fixed capacitors
• CPC Class Codes: Y10T 29/43 Electric condenser making

Abstract

A method of assembling a capacitor assembly comprises positioning a plurality of capacitors in respective sockets formed in a non-conductive matrix by vibrating the plurality of capacitors and disposing the array of capacitors and the non-conductive matrix between a positive terminal plate and a negative terminal plate. The capacitors are electrically coupled with the positive terminal plate and the negative terminal plate and mechanically secured between the positive terminal plate and the negative terminal plate. The array of capacitors includes a void cooperating with a first opening in the positive plate and a second opening in the negative plate to form a passage. The void includes a location where at least one capacitor is omitted from the array.

Claims

1. A method of assembling a capacitor assembly, the method comprising:

positioning a plurality of capacitors in respective sockets formed in a non-conductive matrix by vibrating the plurality of capacitors, to form an array of capacitors;

disposing the array of capacitors and the non-conductive matrix between a positive terminal plate and a negative terminal plate, the array of capacitors including a void cooperating with a first opening in the positive plate and a second opening in the negative plate to form a passage, the void including a location where at least one capacitor is omitted from the array;

electrically coupling the capacitors with the positive terminal plate and the negative terminal plate; and

mechanically securing the capacitors between the positive terminal plate and the negative terminal plate.

2. The method as defined in claim 1, wherein the void is surrounded by capacitors within the array of capacitors.

3. The method as defined in claim 1, comprising applying an electrically conductive epoxy to electrically couple the capacitors to the positive terminal plate and the negative terminal plate.