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Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle

  • US 9,761,589 B2
  • Filed: 10/11/2016
  • Issued: 09/12/2017
  • Est. Priority Date: 08/05/2008
  • Status: Active Grant
First Claim
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1. A semiconductor memory cell comprising:

  • a transistor comprising a source region, a first floating body region, a drain region, and a gate; and

    a silicon controlled rectifier device having a cathode region, a second floating body region, a buried layer region, and an anode region, wherein;

    a state of said memory cell is stored in said first floating body region,said first floating body region and said second floating body region are common,said silicon controlled rectifier device maintains a state of said memory cell, andsaid transistor is usable to access said memory cell.

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