Semiconductor device and method for manufacturing semiconductor device

• US 9,761,736 B2
• Filed: 07/22/2014
• Issued: 09/12/2017
• Est. Priority Date: 07/25/2013
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Sasagawa, Shinya, Hondo, Suguru, Suzawa, Hideomi
• Primary Examiner(s): Junge, Bryan
• Application Number:
  US14/337,835
• Publication Number:
  US 20150028330A1
• Time in Patent Office: 1,148 Days
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/467 using masks
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

Provided is a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with each side surface of the first oxide semiconductor film and the second oxide semiconductor film; a first insulating film and a second insulating film over the source electrode and the drain electrode; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with an upper surface of the gate insulating film and facing an upper surface and the side surface of the second oxide semiconductor film.

Claims

1. A semiconductor device comprising:

a first insulating film;

a first oxide semiconductor film over the first insulating film;

a second oxide semiconductor film over the first oxide semiconductor film;

a first conductive film and a second conductive film over the first insulating film;

a third oxide semiconductor film over the second oxide semiconductor film, the first conductive film, and the second conductive film;

a second insulating film over the third oxide semiconductor film; and

a third conductive film over the second insulating film,

wherein each of the first conductive film and the second conductive film is in contact with a first side surface of the second oxide semiconductor film,

wherein, in a channel width direction, the third conductive film faces a second side surface of the second oxide semiconductor film,

wherein the first oxide semiconductor film comprises a depressed portion, and

wherein the third oxide semiconductor film is in contact with the depressed portion.

2. The semiconductor device according to claim 1, wherein, in the channel width direction, the third oxide semiconductor film is in contact with the second side surface of the second oxide semiconductor film.

3. The semiconductor device according to claim 1, wherein an entire upper surface of the second oxide semiconductor film is in contact with the third oxide semiconductor film.

4. The semiconductor device according to claim 1, wherein, in a channel length direction, a length of the third oxide semiconductor film is larger than a length of each of the first oxide semiconductor film and the second oxide semiconductor film.

5. The semiconductor device according to claim 1, wherein the third oxide semiconductor film comprises indium, gallium, and zinc.

6. A semiconductor device comprising:

a first conductive film;

a first insulating film over the first conductive film;

a first oxide semiconductor film over the first insulating film;

a second oxide semiconductor film over the first oxide semiconductor film;

a second conductive film and a third conductive film over the first insulating film;

a third oxide semiconductor film over the second oxide semiconductor film, the first conductive film, and the second conductive film;

a second insulating film over the third oxide semiconductor film; and

a fourth conductive film over the second insulating film,

wherein each of the second conductive film and the third conductive film is in contact with a first side surface of the second oxide semiconductor film,

wherein, in a channel width direction, the fourth conductive film faces a second side surface of the second oxide semiconductor film,

wherein the first oxide semiconductor film comprises a depressed portion, and

wherein the third oxide semiconductor film is in contact with the depressed portion.

7. The semiconductor device according to claim 6, wherein, in the channel width direction, the third oxide semiconductor film is in contact with the second side surface of the second oxide semiconductor film.

8. The semiconductor device according to claim 6, wherein an entire upper surface of the second oxide semiconductor film is in contact with the third oxide semiconductor film.

9. The semiconductor device according to claim 6, wherein, in a channel length direction, a length of the third oxide semiconductor film is larger than a length of each of the first oxide semiconductor film and the second oxide semiconductor film.

10. The semiconductor device according to claim 6, wherein the fourth conductive film is electrically connected to the first conductive film.

11. The semiconductor device according to claim 6, wherein the third oxide semiconductor film comprises indium, gallium, and zinc.