Semiconductor device

• US 9,761,737 B2
• Filed: 04/29/2014
• Issued: 09/12/2017
• Est. Priority Date: 05/01/2013
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tanaka, Tetsuhiro
• Primary Examiner(s): Jackson, Jr., Jerome
• Assistant Examiner(s): SPALLA, DAVID C
• Application Number:
  US14/264,823
• Publication Number:
  US 20140326994A1
• Time in Patent Office: 1,232 Days
• Field of Search: 257 43
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A highly reliable semiconductor device which uses an oxide semiconductor and in which a change in the electrical characteristics is suppressed is provided. The semiconductor device includes an island-shaped semiconductor layer over a base insulating layer, a pair of electrodes over the semiconductor layer, a barrier layer in contact with undersurfaces of the electrodes, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The semiconductor layer contains an oxide semiconductor. The base insulating layer contains silicon oxide or silicon oxynitride. The electrodes each contain Al, Cr, Cu, Ta, Ti, Mo, or W. The barrier layer contains oxide containing one or more metal elements contained in the oxide semiconductor. Furthermore, the electrodes and the barrier layer extend to the outside of the semiconductor layer when seen from above.

Claims

1. A semiconductor device comprising:

a first transistor comprising a semiconductor material;

a wiring over the first transistor;

a first insulating layer over the wiring; and

a second transistor over the first insulating layer, the second transistor comprising;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over the oxide semiconductor layer;

a first barrier layer between the oxide semiconductor layer and one of the source electrode and the drain electrode;

a second barrier layer between the oxide semiconductor layer and the other of the source electrode and the drain electrode;

a gate insulating layer over the source electrode and the drain electrode; and

a gate electrode over the gate insulating layer,

wherein the semiconductor material comprises at least one of silicon, germanium, silicon germanium, silicon carbide, and gallium arsenide,

wherein each of the first barrier layer and the second barrier layer comprises an oxide including indium, zinc and a first metal,

wherein the oxide semiconductor layer comprises indium, zinc, and the first metal,

wherein the first metal is one of aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, and hafnium,

wherein the first barrier layer is in contact with the wiring through an opening provided in the first insulating layer,

wherein the oxide semiconductor layer comprises a first region extending from one edge to the other edge of the oxide semiconductor layer when seen from a top of the semiconductor device, and

wherein one of the first barrier layer and the second barrier layer, one of the source electrode and the drain electrode, and the gate electrode overlap with an entirety of the first region of the oxide semiconductor layer when seen from the top of the semiconductor device.

2. The semiconductor device according to claim 1, wherein the second transistor further comprises a second gate electrode under the first insulating layer.

3. The semiconductor device according to claim 1, wherein a content of the first metal of each of the first barrier layer and the second barrier layer is lower than or equal to an indium content of each of the first barrier layer and the second barrier layer.

4. The semiconductor device according to claim 1,

wherein the first insulating layer comprises silicon oxide or silicon oxynitride, and

wherein the first insulating layer comprises oxygen at a higher proportion than a stoichiometric composition of the first insulating layer.

5. The semiconductor device according to claim 1, wherein each of the source electrode and the drain electrode comprises at least one of aluminum, chromium, copper, tantalum, titanium, and molybdenum.

6. The semiconductor device according to claim 1, further comprising a second insulating layer over the second transistor,

wherein the second insulating layer comprises at least one of silicon nitride, silicon nitride oxide, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

7. The semiconductor device according to claim 1, wherein each of the first barrier layer and the second barrier layer has a thickness greater than or equal to 3 nm and less than or equal to 100 nm.

8. The semiconductor device according to claim 1, wherein a shape of one of the first barrier layer and the second barrier layer and a shape of one of the source electrode and the drain electrode are substantially aligned with each other when seen from above.

9. The semiconductor device according to claim 1, wherein a width of the oxide semiconductor layer is smaller than a width of each of the first barrier layer and the second barrier layer and a width of each of the source electrode and the drain electrode in a channel width direction.

10. A semiconductor device comprising:

a first insulating layer over a wiring;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over the oxide semiconductor layer;

a first barrier layer between the oxide semiconductor layer and one of the source electrode and the drain electrode;

a second barrier layer between the oxide semiconductor layer and the other of the source electrode and the drain electrode;

a gate insulating layer over the source electrode and the drain electrode; and

a gate electrode over the gate insulating layer,

wherein each of the first barrier layer and the second barrier layer comprises an oxide including indium, zinc and a first metal,

wherein the oxide semiconductor layer comprises indium, zinc, and the first metal,

wherein the first metal is one of aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, and hafnium,

wherein the first barrier layer is in contact with the wiring through an opening provided in the first insulating layer, and

wherein an indium content of each of the first barrier layer and the second barrier layer is higher than an indium content of the oxide semiconductor layer.

11. The semiconductor device according to claim 10, wherein a shape of one of the first barrier layer and the second barrier layer and a shape of one of the source electrode and the drain electrode are substantially aligned with each other when seen from above.

12. The semiconductor device according to claim 10, wherein a content of the first metal of each of the first barrier layer and the second barrier layer is lower than or equal to the indium content of each of the first barrier layer and the second barrier layer.

13. The semiconductor device according to claim 10, wherein a width of the oxide semiconductor layer is smaller than a width of each of the first barrier layer and the second barrier layer and a width of each of the source electrode and the drain electrode in a channel width direction.

14. The semiconductor device according to claim 10,

wherein a width of the oxide semiconductor layer is smaller than a width of each of the first barrier layer and the second barrier layer and a width of each of the source electrode and the drain electrode in a channel width direction.

15. A semiconductor device comprising:

a first insulating layer over a wiring;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over the oxide semiconductor layer;

a first barrier layer between the oxide semiconductor layer and one of the source electrode and the drain electrode;

a second barrier layer between the oxide semiconductor layer and the other of the source electrode and the drain electrode;

a gate insulating layer over the source electrode and the drain electrode; and

a gate electrode over the gate insulating layer,

wherein each of the first barrier layer and the second barrier layer comprises an oxide including indium, zinc and a first metal,

wherein the oxide semiconductor layer comprises indium, zinc, and the first metal,

wherein the first metal is one of aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, and hafnium, and

wherein the first barrier layer is in contact with the wiring through an opening provided in the first insulating layer.

16. The semiconductor device according to claim 15, further comprising a second gate electrode under the first insulating layer.

17. The semiconductor device according to claim 15, wherein a content of the first metal of each of the first barrier layer and the second barrier layer is lower than or equal to an indium content of each of the first barrier layer and the second barrier layer.

18. The semiconductor device according to claim 15,

wherein the first insulating layer comprises silicon oxide or silicon oxynitride, and

wherein the first insulating layer comprises oxygen at a higher proportion than a stoichiometric composition of the first insulating layer.

19. The semiconductor device according to claim 15, wherein each of the first barrier layer and the second barrier layer has a thickness greater than or equal to 3 nm and less than or equal to 100 nm.

20. The semiconductor device according to claim 15, wherein a shape of one of the first barrier layer and the second barrier layer and a shape of one of the source electrode and the drain electrode are substantially aligned with each other when seen from above.

21. The semiconductor device according to claim 15, wherein a width of the oxide semiconductor layer is smaller than a width of each of the first barrier layer and the second barrier layer and a width of each of the source electrode and the drain electrode in a channel width direction.

22. The semiconductor device according to claim 15, wherein the first barrier layer is in contact with a side surface of the opening and a top surface of the wiring.

23. The semiconductor device according to claim 15, wherein the one of the source and the drain electrode is provided inside the opening provided in the first insulating layer.