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Filling vacant areas of an integrated circuit design

  • US 9,767,242 B1
  • Filed: 06/04/2013
  • Issued: 09/19/2017
  • Est. Priority Date: 03/18/2009
  • Status: Active Grant
First Claim
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1. A method comprising:

  • using a computer, automatically creating a first shape comprising rectangles that is representative of free space on a first layer of an integrated circuit design;

    automatically creating a second shape comprising rectangles that is representative of free space on a second layer of the integrated circuit design, wherein the second layer is different from the first layer;

    automatically creating a first via shape in a third layer, different from the first and second layers, that overlaps both the first and second shapes;

    determining whether the first shape is further coupled to a third shape on a fourth layer, different from the first and second layers, wherein the third shape is representative of a power voltage net;

    if the first shape has a further coupling to the third shape, not discarding the first shape and the first via shape; and

    forming an integrated circuit from the integrated circuit design.

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