Low defect relaxed SiGe/strained Si structures on implant anneal buffer/strain relaxed buffer layers with epitaxial rare earth oxide interlayers and methods to fabricate same
First Claim
1. A method comprising:
- providing a substrate having a top surface;
forming a first semiconductor layer on the top surface of the substrate, the first semiconductor layer having a first unit cell geometry;
epitaxially depositing a layer comprised of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry;
ion implanting the first semiconductor layer through the layer comprised of a metal-containing oxide so that an implant peak of implanted ions is located within the first semiconductor layer;
annealing the ion implanted first semiconductor layer; and
forming a second semiconductor layer on the layer comprised of a metal-containing oxide, the second semiconductor layer having the first unit cell geometry.
1 Assignment
0 Petitions
Accused Products
Abstract
A method provides a substrate having a top surface; forming a first semiconductor layer on the top surface, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer of metal-containing oxide; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer of metal-containing oxide, the second semiconductor layer having the first unit cell geometry. The layer of metal-containing oxide functions to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer. A structure formed by the method is also disclosed.
21 Citations
9 Claims
-
1. A method comprising:
-
providing a substrate having a top surface; forming a first semiconductor layer on the top surface of the substrate, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer comprised of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer comprised of a metal-containing oxide so that an implant peak of implanted ions is located within the first semiconductor layer; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer comprised of a metal-containing oxide, the second semiconductor layer having the first unit cell geometry. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
Specification