Solid-state image pickup device and method for driving the same in solid-state imaging pickup device and method for driving the same in a number of modes

• US 9,769,411 B2
• Filed: 06/13/2016
• Issued: 09/19/2017
• Est. Priority Date: 02/23/2004
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Nitta, Yoshikazu, Fukushima, Noriyuki, Muramatsu, Yoshinori, Yasui, Yukihiko
• Primary Examiner(s): VILLECCO, JOHN M
• Application Number:
  US15/180,300
• Publication Number:
  US 20160295145A1
• Time in Patent Office: 463 Days
• Field of Search: 348302, 348308, 348283, 348281, 348321, 348323, 348316, 341164, 341165
• CPC Class Codes: H03M 1/1023 Offset correction H03M1/1019 takes precedence; removal of offset already present on the analogue input signal H03M1/1295
• CPC Class Codes: H03M 1/56 Input signal compared with linear ramp
• CPC Class Codes: H04N 23/54 Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
• CPC Class Codes: H04N 25/46 by combining or binning pixels
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters
• CPC Class Codes: H04N 3/1562 for selective scanning, e.g. windowing, zooming

Abstract

A system and method for driving a solid-state image pickup device including a pixel array unit including unit pixels. Each unit pixel includes a photoelectric converter, column signal lines and a number of analog-digital converting units. The unit pixels are selectively controlled in units of rows. Analog signals output from the unit pixels in a row selected by the selective control though the column signal lines are converted to digital signals via the analog-digital converting units. The digital signals are added among a number of unit pixels via the analog-digital converting units. The added digital signals from the analog-digital converting units are read. Each unit pixel in the pixel array unit is selectively controlled in units of arbitrary rows, the analog-distal converting units being operable to performing the converting in a (a) normal-frame-rate mode and a (b) high-frame-rate mode in response to control signals.

Claims

1. An imaging device comprising:

a pixel array unit including a plurality of pixels which are two-dimensionally arranged in columns and rows;

a plurality of signal lines including a first signal line coupled to a first pixel of the plurality of pixels and a second signal line between the first signal line and a third signal line;

a plurality of analog-to-digital (A/D) converters, each A/D converter of the plurality of A/D converters including a comparator, a counter, and a memory;

a plurality of switch circuits;

a first comparator of a first A/D converter coupled to the first signal line; and

a second comparator of a second A/D converter selectively coupled to the second signal line or the third signal line through a first switch circuit of the plurality of switch circuits,

wherein,

the first comparator is configured to output a first signal based on an output of the first signal line,

the second comparator is configured to output a second signal based on an output of the third signal line at a same time the first comparator is configured to output the first signal based on the output of the first signal line, and

the memory of the second A/D converter is configured to receive a third signal based on the second signal.

2. The imaging device according to claim 1, further comprising a reference signal generation circuit that supplies a reference signal to the first comparator.

3. The imaging device according to claim 1, wherein the memory of the second A/D converter is coupled to a counter of the second A/D converter.

4. The imaging device according to claim 3, wherein the memory of the second A/D converter is configured to receive the third signal based on the second signal through the counter of the second A/D converter.

5. The imaging device according to claim 4, wherein each pixel of the plurality of the pixels includes a photoelectric conversion element, a reset transistor, a transfer transistor, an amplifier transistor, and a select transistor.

6. The imaging device according to claim 1, further comprising a third comparator selectively coupled to the third signal line through a second switch circuit of the plurality of switch circuits.

7. An imaging device comprising:

a pixel array unit including a plurality of pixels which are two-dimensionally arranged in columns and rows;

a plurality of signal lines including a first signal line coupled to a first pixel of the plurality of pixels and a second signal line between the first signal line and a third signal line;

a plurality of analog-to-digital (A/D) converters, each A/D converter of the plurality of A/D converters including a comparator, a counter, and a memory;

a plurality of switch circuits;

a first comparator of a first A/D converter coupled to the first signal line; and

a second comparator of a second A/D converter selectively coupled to the second signal line or the third signal line through a first switch circuit of the plurality of switch circuits,

wherein,

the first A/D converter is configured to output a first signal based on an output of the first signal line, and

the second A/D converter is configured to output a second signal based on an output of the third signal line at a same time the first A/D converter is configured to output the first signal based on the output of the first signal line.

8. The imaging device according to claim 7, further comprising a reference signal generation circuit that supplies a reference signal to the first comparator.

9. The imaging device according to claim 7, wherein memory of the second A/D converter is coupled to a counter of the second A/D converter.

10. The imaging device according to claim 9, wherein the memory of the second A/D converter is configured to receive a third signal based on the second signal through the counter of the second A/D converter.

11. The imaging device according to claim 10, wherein each pixel of the plurality of the pixels includes a photoelectric conversion element, a reset transistor, a transfer transistor, an amplifier transistor, and a select transistor.

12. The imaging device according to claim 7, further comprising a third comparator selectively coupled to the third signal line through a second switch circuit of the plurality of switch circuits.

13. The imaging device according to claim 7, further comprising an output line connected to a signal processing circuit.

14. An electronic apparatus comprising;

an optical system; and

an imaging device including;

a pixel array unit including a plurality of pixels which are two-dimensionally arranged in columns and rows,

a plurality of signal lines including a first signal line coupled to a first pixel of the plurality of pixels and a second signal line between the first signal line and a third signal line,

a plurality of analog-to-digital (A/D) converters, each A/D converter of the plurality of A/D converters including a comparator, a counter, and a memory,

a plurality of switch circuits,

a first comparator of a first A/D converter coupled to the first signal line, and

a second comparator of a second A/D converter selectively coupled to the second signal line or the third signal line through a first switch circuit of the plurality of switch circuits,

wherein,

the first A/D converter is configured to output a first signal based on an output of the first signal line, and

the second A/D converter is configured to output a second signal based on an output of the third signal line at a same time the first A/D converter is configured to output the first signal based on the output of the first signal line.

15. The electronic apparatus according to claim 14, further comprising a reference signal generation circuit that supplies a reference signal to the first comparator.

16. The electronic apparatus according to claim 14, wherein memory of the second A/D converter is coupled to a counter of the second A/D converter.

17. The electronic apparatus according to claim 16, wherein the memory of the second A/D converter is configured to receive a third signal based on the second signal through the counter of the second A/D converter.

18. The electronic apparatus according to claim 17, wherein each pixel of the plurality of the pixels includes a photoelectric conversion element, a reset transistor, a transfer transistor, an amplifier transistor, and a select transistor.

19. The electronic apparatus according to claim 14, further comprising a third comparator selectively coupled to the third signal line through a second switch circuit of the plurality of switch circuits.

20. The electronic apparatus according to claim 14, further comprising an output line connected to a signal processing circuit.