Dynamic current-limit circuit

• US 9,772,639 B2
• Filed: 09/25/2015
• Issued: 09/26/2017
• Est. Priority Date: 03/05/2015
• Status: Active Grant

• Current Assignee: Dialog Semiconductor UK Ltd (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor UK Ltd (Renesas Electronics Corporation)
• Inventors: Farber, Martin, Masuch, Jens
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): NASH, GARY A
• Application Number:
  US14/864,983
• Publication Number:
  US 20160259355A1
• Time in Patent Office: 732 Days
• Field of Search: 323241-243, 323246, 323274-277, 323280, 323282-285
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

A comparator circuit is described, which is configured to provide a control current and a control voltage based on a first input voltage and a second input voltage. The comparator circuit comprises an input amplifier configured to generate an output signal based on the first input voltage and the second input voltage, and offset means configured to generate a first offset. Furthermore, the comparator circuit comprises a first output circuit configured to generate the control current based on the output signal and based on the first offset. In addition, the comparator circuit comprises a second output circuit configured to generate the control voltage based on the output signal and not based on the first offset.

Claims

1. A comparator circuit which is configured to provide a control current and a control voltage based on a first input voltage and a second input voltage, the comparator circuit comprising

an input amplifier configured to generate an output signal based on a delta voltage which corresponds to a difference between the first input voltage and the second input voltage;

offset means configured to generate a first offset;

a first output circuit configured to generate the control current based on the output signal and based on the first offset; and

a second output circuit configured to generate the control voltage based on the output signal and not based on the first offset;

wherein the second output circuit is configured to generate the control voltage such that the control voltage exhibits a swing from a first potential to a second potential at a first delta voltage; and

wherein the first output circuit is configured to generate the control current such that the control current is substantially linear for delta voltages within a pre-determined interval around the first delta voltage.

2. The comparator circuit of claim 1, wherein

the control current exhibits a first current value at the first delta voltage;

and

the first current value is dependent on the first offset.

3. The comparator circuit of claim 1, wherein the input amplifier comprises a differential pair with a first input transistor which is controlled using the first input voltage and with a second input transistor which is controlled using the second input voltage.

4. The comparator circuit of claim 3, wherein

the input amplifier is configured to provide a first output signal and a second output signal;

the first output signal is dependent on a current through the first input transistor; and

the second output signal is dependent on a current through the second input transistor.

5. The comparator circuit of claim 4, wherein

the second output circuit comprises an upper transistor which is coupled to a supply voltage and a lower transistor which is coupled to ground;

an upper transistor and a lower transistor are arranged in series;

said lower transistor is controlled using the first output signal;

said upper transistor is controlled using the second output signal; and

the control voltage is dependent on a level of a midpoint between said lower transistor and said upper transistor.

6. The comparator circuit of claim 5, wherein the first output circuit is configured to generate the control current based on the level of the midpoint between said lower transistor and said upper transistor and based on the first offset.

7. The comparator circuit of claim 6, wherein the first output circuit is coupled to the midpoint between said lower transistor and said upper transistor via a diode function, wherein the diode function exhibits a forward voltage drop.

8. The comparator circuit of claim 1, further comprising

second offset means configured to generate a second offset;

and

a third output circuit configured to generate a second control voltage based on the output signal and based on the second offset.

9. The comparator circuit of claim 1, wherein the input amplifier is configured to apply a gain, wherein the gain is greater than one.

10. A DC-DC power converter which is configured to provide an output current at an output voltage to a load at an output of the DC-DC power converter, wherein the DC-DC power converter comprises

a high side switch and a low side switch which are arranged in series between a supply voltage and ground;

an inductor which is arranged to couple a midpoint between the high side switch and the low side switch to the output of the DC-DC power converter;

a control circuit which is configured to switch on or off the high side switch based on an under-voltage signal and based on a current-limit signal;

a feedback loop configured to provide a feedback voltage based on the output voltage;

a current sense circuit which is configured to provide a sensed current that is indicative of a current through the inductor;

a comparator circuit which is configured to provide a control current and a control voltage based on a first input voltage and a second input voltage, the comparator circuit comprising

an input amplifier configured to generate an output signal based on a delta voltage which corresponds to a difference between the first input voltage and the second input voltage;

offset means configured to generate a first offset;

a first output circuit configured to generate the control current based on the output signal and based on the first offset; and

a second output circuit configured to generate the control voltage based on the output signal and not based on the first offset;

wherein the second output circuit is configured to generate the control voltage such that the control voltage exhibits a swing from a first potential to a second potential at a first delta voltage; and

wherein the first output circuit is configured to generate the control current such that the control current is substantially linear for delta voltages within a pre-determined interval around the first

delta voltage

which is configured to provide the under-voltage signal and a reference current based on the feedback voltage and based on a reference voltage;

wherein the current-limit signal is dependent on the sensed current and on the reference current.

11. The DC-DC power converter of claim 10, wherein the control circuit is configured to

turn on the high side switch, if the under-voltage signal indicates that the feedback voltage is lower than the reference voltage by at least a pre-determined under-voltage threshold;

turn off the high side switch, if the current-limit signal indicates that the sensed current reaches the reference current; and

maintain the high side switch off for at least a pre-determined off-time.

12. The DC-DC power converter of claim 10, wherein the comparator circuit is configured to

determine whether the feedback voltage is lower than the reference voltage by at least a pre-determined panic threshold;

generate a fixed reference current, if the feedback voltage is not lower than the reference voltage by at least the pre-determined panic threshold; and

generate an adaptive reference current which is dependent on a difference between the feedback voltage and the reference voltage, if the feedback voltage is lower than the reference voltage by at least the pre-determined panic threshold.

13. The DC-DC power converter of claim 12, wherein

the comparator circuit comprises offset means configured to provide one or more offsets;

the pre-determined panic threshold and the reference current are dependent on the one or more offsets; and

the one or more offsets are such that the adaptive reference current substantially corresponds to the fixed reference current if the feedback voltage is lower than the reference voltage by the pre-determined panic threshold.

14. A method for providing a control current and a control voltage based on a first input voltage and a second input voltage, the method comprising

generating an output signal based on the first input voltage and the second input voltage;

generating a first offset;

generating the control current based on the output signal and based on the first offset; and

generating the control voltage based on the output signal and not based on the first offset;

wherein the control voltage is generated such that the control voltage exhibits a swing from a first potential to a second potential at a first delta voltage; and

wherein the control current is generated such that the control current is substantially linear for delta voltages within a pre-determined interval around the first delta voltage.

15. The method of claim 14, further comprising the steps of:

generating by the second output circuit the control voltage such that the control voltage exhibits a swing from a first potential to a second potential at a first delta voltage; and

generating by the first output circuit the control current such that the control current is substantially linear for delta voltages within a pre-determined interval around the first delta voltage.

16. The method of claim 15, wherein

the control current exhibits a first current value at the first delta voltage;

and

the first current value is dependent on the first offset.

17. The method of claim 16, wherein the input amplifier comprises a differential pair with a first input transistor which is controlled using the first input voltage and with a second input transistor which is controlled using the second input voltage.

18. The method of claim 17, wherein

the input amplifier provides a first output signal and a second output signal;

the first output signal is dependent on a current through the first input transistor; and

the second output signal is dependent on a current through the second input transistor.

19. The method of claim 18, wherein

the second output circuit comprises an upper transistor which is coupled to a supply voltage and a lower transistor which is coupled to ground;

the upper transistor and the lower transistor are arranged in series;

the lower transistor is controlled using the first output signal;

the upper transistor is controlled using the second output signal; and

the control voltage is dependent on a level of a midpoint between the lower transistor and the upper transistor.

20. The method of claim 19, further comprising the step of:

generating by the first output circuit the control current based on the level of the midpoint between the lower transistor and the upper transistor and based on the first offset.

21. The method of claim 20, further comprising the step of:

coupling the first output circuit to the midpoint between the lower transistor and the upper transistor via a diode function, wherein the diode function exhibits a forward voltage drop.

22. The method of claim 14, further comprising the steps of:

generating by second offset means a second offset; and

generating by a third output circuit a second control voltage based on the output signal and based on the second offset.

23. The method of claim 14, further comprising the step of:

applying by an input amplifier a gain, wherein the gain is greater than one.