Selectively controlling instruction execution in transactional processing

• US 9,772,854 B2
• Filed: 06/15/2012
• Issued: 09/26/2017
• Est. Priority Date: 06/15/2012
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Jacobi, Christian, Rogers, Robert R., Slegel, Timothy J.
• Primary Examiner(s): Pham, Tuan A
• Application Number:
  US13/524,898
• Publication Number:
  US 20130339328A1
• Time in Patent Office: 1,929 Days
• Field of Search: None
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/3004 to perform operations on memory
• CPC Class Codes: G06F 9/30047 Prefetch instructions; cache control instructions
• CPC Class Codes: G06F 9/30076 to perform miscellaneous control operations, e.g. NOP
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/30098 Register arrangements
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields
• CPC Class Codes: G06F 9/30181 Instruction operation extension or modification
• CPC Class Codes: G06F 9/3834 Maintaining memory consistency
• CPC Class Codes: G06F 9/3861 Recovery, e.g. branch miss-prediction, exception handling error detection or correction G06F11/00
• CPC Class Codes: G06F 9/466 Transaction processing

Abstract

Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

Claims

1. A computer program product for controlling execution of instructions within transactions of a computing environment, a transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction, said computer program product comprising:

a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an operation code to specify a transaction begin operation; and

at least one control to be used in controlling execution of one or more types of instructions in transactional processing; and

executing, by the processor, the machine instruction, the executing comprising;

initiating a transaction; and

using a first control of the at least one control to determine a first value, the first value to control execution within the transaction of an instruction of a first type, wherein the first control is one of an allow access register modification control or an allow floating point operation control, and wherein based on the first control being the allow access register modification control, the first type comprises instructions that modify a type of register referred to as an access register, the access register including an indirect specification of an address space control element to be used in address translation, the allow access register modification control to be used to indicate whether the transaction is permitted to execute an instruction that modifies an access register; and

based on the first control being the allow floating point operation control, the first type comprises specified floating point instructions, the allow floating point operation control to be used to indicate whether the transaction is permitted to execute the specified floating point instructions.

2. The computer program product of claim 1, wherein the first control is the allow access register modification control, and the using comprises performing a logical AND of the allow access register modification control of the machine instruction for a current nesting level of transactions of which the machine instruction is a part and outer nesting levels, if any, to determine the first value, the first value comprising an effective allow access register modification control.

3. The computer program product of claim 1, wherein the first control is the allow floating point operation control, and the using comprises performing a logical AND of the allow floating point operation control of the machine instruction for a current nesting level of transactions of which the machine instruction is a part and outer nesting levels, if any, to determine the first value, the first value comprising an effective allow floating point operation control.

4. The computer program product of claim 1, wherein the first control is the allow access register modification control and the first type comprises instructions that modify the access register, and wherein the at least one control further comprises a second control, the second control comprising the allow floating point operation control to be used to indicate whether the transaction is permitted to execute specified floating point instructions.

5. The computer program product of claim 1, wherein the transaction comprises a nonconstrained transaction.

6. The computer program product of claim 1, wherein the transaction comprises a constrained transaction.

7. The computer program product of claim 1, wherein the method further comprises:

obtaining, by the processor, an instruction within the transaction initiated by the transaction begin operation;

determining by the processor based on at least one value computed based on the at least one control whether the instruction is an instruction to be prohibited from execution; and

executing the instruction based on the determining indicating the instruction is not to be prohibited from execution.

8. The computer program product of claim 1, wherein the transaction is part of a nest of transactions, and wherein the method further comprises re-determining the first value based on termination of a transaction of the nest of transactions.

9. The computer program product of claim 1, wherein the one or more types of instructions comprises specified floating point instructions or instructions that modify the access register;

and wherein, the instruction of the first type comprises a floating point instruction or an instruction that modifies an access register.

10. A computer system for controlling execution of instructions within transactions of a computing environment, a transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction, said computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an operation code to specify a transaction begin operation; and

at least one control to be used in controlling execution of one or more types of instructions in transactional processing; and

executing, by the processor, the machine instruction, the executing comprising;

initiating a transaction; and

using a first control of the at least one control to determine a first value, the first value to control execution within the transaction of an instruction of a first type, wherein the first control is one of an allow access register modification control or an allow floating point operation control, and wherein based on the first control being the allow access register modification control, the first type comprises instructions that modify a type of register referred to as an access register, the access register including an indirect specification of an address space control element to be used in address translation, the allow access register modification control to be used to indicate whether the transaction is permitted to execute an instruction that modifies an access register; and

based on the first control being the allow floating point operation control, the first type comprises specified floating point instructions, the allow floating point operation control to be used to indicate whether the transaction is permitted to execute the specified floating point instructions.

11. The computer system of claim 10, wherein the first control is the allow access register modification control, and the using comprises performing a logical AND of the allow access register modification control of the machine instruction for a current nesting level of transactions of which the machine instruction is a part and outer nesting levels, if any, to determine the first value, the first value comprising an effective allow access register modification control.

12. The computer system of claim 10, wherein the first control is the allow floating point operation control, and the using comprises performing a logical AND of the allow floating point operation control of the machine instruction for a current nesting level of transactions of which the machine instruction is a part and outer nesting levels, if any, to determine the first value, the first value comprising an effective allow floating point operation control.

13. The computer system of claim 10, wherein the transaction comprises a nonconstrained transaction.

14. The computer system of claim 10, wherein the transaction comprises a constrained transaction.

15. The computer system of claim 10, wherein the method further comprises:

obtaining, by the processor, an instruction within the transaction initiated by the transaction begin operation;

determining by the processor based on at least one value computed based on the at least one control whether the instruction is an instruction to be prohibited from execution; and

executing the instruction based on the determining indicating the instruction is not to be prohibited from execution.

16. The computer system of claim 10, wherein the transaction is part of a nest of transactions, and wherein the method further comprises re-determining the first value based on termination of a transaction of the nest of transactions.

17. The computer system of claim 10, wherein the one or more types of instructions comprises specified floating point instructions or instructions that modify the access register;

and wherein, the instruction of the first type comprises a floating point instruction or an instruction that modifies an access register.