FETs and methods of forming FETs

• US 9,773,786 B2
• Filed: 04/30/2015
• Issued: 09/26/2017
• Est. Priority Date: 04/30/2015
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Ching, Kuo-Cheng, Liu, Chi-Wen, Wang, Chih-Hao
• Primary Examiner(s): Chin, Edward
• Application Number:
  US14/700,190
• Publication Number:
  US 20160322358A1
• Time in Patent Office: 880 Days
• Field of Search: 438283, 438197, 438440, 257E21409, 257E2154, 257E29001, 257E29081, 257E29242, 257E29255, 257327, 257328, 257401, 257 76, 257 77
• CPC Class Codes: H01L 21/02236 group IV semiconductor
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/823821 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823878 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 27/0924 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/0642 Isolation within the component, i.e. internal isolation
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions

Abstract

An embodiment is a method including forming a first fin and a second fin on a substrate, the first fin and the second fin each including a first crystalline semiconductor material on a substrate and a second crystalline semiconductor material above the first crystalline semiconductor material. Converting the first crystalline semiconductor material in the second fin to a dielectric material, wherein after the converting step, at least a portion of the first crystalline semiconductor material in the first fin remains unconverted. Forming gate structures over the first fin and the second fin, and forming source/drain regions on opposing sides of the gate structures.

Claims

1. A method comprising:

forming a first fin and a second fin, the first fin and the second fin each comprising a substrate semiconductor material, a first crystalline semiconductor material above the substrate semiconductor material, and a second crystalline semiconductor material above the first crystalline semiconductor material, wherein the first crystalline semiconductor material is a different material from the second crystalline semiconductor material;

converting the first crystalline semiconductor material in the first fin to a first dielectric material, wherein after the converting the first crystalline semiconductor material step, at least a portion of the first crystalline semiconductor material in the first fin remains unconverted;

converting all of the first crystalline semiconductor material in the second fin to a second dielectric material;

forming gate structures over the first fin and the second fin; and

forming source/drain regions on opposing sides of the gate structures.

2. The method of claim 1, wherein each of the converting steps comprises using an oxidation process.

3. The method of claim 1, wherein the remaining portion of unconverted first crystalline semiconductor material in the first fin is continuous from the substrate to the second crystalline semiconductor material in the first fin.

4. The method of claim 1 further comprising:

before the converting the first crystalline semiconductor material in the second fin, forming a mask over the first fin; and

after the converting the first crystalline semiconductor material step in the second fin, removing the mask from the first fin.

5. The method of claim 1, further comprising:

converting portions of the second crystalline semiconductor material in the first fin and the second fin to a third dielectric material, and removing the third dielectric material.

6. The method of claim 1, wherein the first fin is a part of an n-type FinFET and the second fin is a part of a p-type FinFET.

7. The method of claim 1, wherein first crystalline semiconductor material is silicon germanium, the second crystalline semiconductor material is silicon, and dielectric material is silicon germanium oxide.

8. The method of claim 1, wherein the forming source/drain regions on opposing sides of the gate structure further comprises:

etching the second crystalline semiconductor material and the first crystalline semiconductor material outside of the gate structure; and

epitaxially growing a third crystalline semiconductor material on the substrate.

9. The method of claim 1, wherein more of the second crystalline semiconductor material is converted into the third dielectric material on the first fin than on the second fin.

20. The method of claim 1, wherein the third dielectric material is on sidewalls of the second crystalline semiconductor material.

10. A method comprising:

epitaxially growing a first crystalline semiconductor material on a substrate;

epitaxially growing a second crystalline semiconductor material above the first crystalline semiconductor material;

patterning the first crystalline semiconductor material and the second crystalline semiconductor material to form a first fin and second fin on the substrate;

oxidizing at least a portion of the first crystalline semiconductor material in the first fin and all of the first crystalline semiconductor material in the second fin to form a first oxide material, and oxidizing at least a portion of the second crystalline semiconductor material in the first fin and the second fin to form a second oxide material, wherein after the oxidizing of the first fin and the second fin, a portion of the first crystalline semiconductor material in the first fin is not oxidized;

removing at least a portion of the second oxide material;

forming isolation regions on the substrate and surrounding at least lower portions of the first fin and the second fin;

forming gate structures over the first fin, the second fin, and the isolation regions; and

forming source/drain regions on opposing sides of the gate structures.

11. The method of claim 10, wherein the first crystalline semiconductor material is epitaxially grown as a first blanket layer on the substrate, and the second crystalline semiconductor material is epitaxially grown as a second blanket layer on the first blanket layer, the first blanket layer and the second blanket layer being etched to form the first fin and the second fin.

12. The method of claim 10, wherein the second oxide material is on sidewalls of the second crystalline semiconductor material.

13. The method of claim 10, wherein first crystalline semiconductor material is silicon germanium, the second crystalline semiconductor material is silicon, and the first oxide material in the first crystalline semiconductor material is silicon germanium oxide.

14. The method of claim 10 further comprising:

after the forming source/drain regions, forming an interlayer dielectric over the source/drain regions;

removing the gate structures forming recesses in the interlayer dielectric;

forming active gate structures in the recesses of the interlayer dielectric; and

forming contacts through the interlayer dielectric to contact the source/drain regions.

15. The method of claim 10 further comprising:

before the oxidizing at least the portion of the first crystalline semiconductor material in the first fin and the second fin;

forming a mask over the first fin;

performing a first oxidizing process on the second fin to oxidize portions of the second fin;

removing the mask from the first fin, wherein after the mask is removed, the oxidizing at least the portion of the first crystalline semiconductor material in the first fin and the second fin is performed; and

removing the second oxide material and the oxidized portions of the second fin.

16. The method of claim 15, wherein after the removing the second oxide material and the oxidized portions of the second fin, the first fin has a first width as measured in a first plane parallel to a major surface of the substrate and the second fin has a second width as measured in the first plane, the second width being less than the first width.

17. A method comprising:

forming a first fin and a second fin on a substrate, the first fin and the second fin each comprising a first crystalline semiconductor material on a substrate and a second crystalline semiconductor material above the first crystalline semiconductor material;

oxidizing the second fin to oxidize all of the first crystalline semiconductor material in the second fin to form a first oxide material;

oxidizing the first fin to oxidize a portion of the first crystalline semiconductor material in the first fin to form a second oxide material, wherein after the oxidizing of the first fin, a portion of the first crystalline semiconductor material in the first fin is not oxidized;

removing a portion of the first and second oxide materials;

forming isolation regions on the substrate and surrounding at least lower portions of the first fin and the second fin;

forming gate structures over the first fin, the second fin, and the isolation regions; and

forming source/drain regions on opposing sides of the gate structures.

18. The method of claim 17, wherein oxidizing the second fin comprises oxidizing sidewalls of the second crystalline semiconductor material in the second fin to form a third oxide material, and wherein oxidizing the first fin comprises oxidizing sidewalls of the second crystalline semiconductor material in the first fin to form a fourth oxide material, further comprising:

removing the third and fourth oxide materials from the respective sidewalls of the second and first fins.

19. The method of claim 18, wherein oxidizing the first fin further comprises oxidizing sidewalls of a first portion of patterned substrate material, and wherein oxidizing the second fin further comprises oxidizing sidewalls of a second portion of patterned substrate material.